fpga manager

Photo by Nicole Y-C on Unsplash

參考:

Xilinx/linux-xlnx

royforu/meta-xilinx-tools

Confluence

2019.9.10 Xilinx FPGA Zynq 通過FPGA Manager加載比特流

Using sysfs interface

Once the linux is up run the below commands to load the Bitstream.
1)Set flags for Full Bitstream.

• echo 0 > /sys/class/fpga_manager/fpga0/flags

2) Loading Bitstream into PL.

• mkdir -p /lib/firmware
• cp /media/design_1_wrapper.bit.bin /lib/firmware/
• echo design_1_wrapper.bit.bin > /sys/class/fpga_manager/fpga0/firmware

FPGA+SoC+Linux+Device Tree Overlay+FPGA Region(SDSoC対応編) - Qiita

time命令:

理解linux time命令的输出_运维_轻锋的专栏-CSDN博客