minst accel in sdsoc

Photo by Luis Graterol on Unsplash

implement in vivado:

in sdsoc:

a. create application project, import hls codes:

b. modify hls codes, no stream concept, just c codes

main function:

Build project:

check design in vivado:

created elf:

Build custom platform with petalinux to execute elf created by sdsoc:

reserve original hls codes to implement in hls:

Create library project: no main function included

wrap function:

compile with main:

runtime download bitstream:

1. create bit.bin file:

type command in shell:

edit command in C code:

參考：

1. Solution Zynq PL Programming With FPGA Manager
2. https://github.com/Xilinx/meta-xilinx-tools/blob/master/recipes-bsp/fpga-manager-script/files/fpgautil.c
3. https://www.twblogs.net/a/5d7dd3a9bd9eee5327ffb198
4. https://irw.ncut.edu.tw/peterju/linux.html