3D ICs Fabrication
3D IC Chip Fabrication
3D ICs with copper TSV and Cu/Ni/SnAg solder balls are fabricated in Global INTegration Initiative(GINTI). In fabricating process a temporary adhesive is spin-coated on carrier glass wafer. Then the wafer is bonded temporarily to another Silicon wafer having electrodes (copper, nickel, gold) on their surface. After thinning of of silicon wafer, The TSVs are formed via-last process and solder balls are formed using electroplating. The silicon wafer with TSVs and solder balls are deboned from carrier wafer and transferred to a dicing tape. On the other hand bottom chips of 3D ICs are fabricated by Cu/Ni/Au electrode/Cu wiring formation and wafer thinning/dicing process. And 3D ICs are fabricated with top and bottom chips using a Flip-chip bonder i.e. FC3000W. For this the bonding temperature is 250 ̊ C.
3D ICS embedded FHS Fabrication
Above Fig. shows the process flow of 3D ICs embedded FHS Fabrication. In this process a 3D IC with Cu-TSVs and Cu/Ni/SnAg solder balls is placed on the 1st Si carrier wafer in facedown alignment. Then Polydimethylsiloxane (PDMS) is poured on 3D IC which is placed on 1st carrier which is followed by vacuum deforming and the wafer level compression molding with 2nd Si carrier. After debonding of the carrier, a stress buffer layers (SBLs) are coated on PDMS or 3D IC. By using photolithography with metals sputtering or wet etching gold wiring which is 500 nm thick is formed on SBL at wafer level. And lastly 2nd carrier is debonded from FHS.
