The Triumph of Quantum Mechanics at the Heart of Solid State Data Storage

by Andrew Walker

Elementary Quantum Mechanics, R.W. Gurney, 2nd Ed., 1940. © Cambridge University Press. Reprinted with the permission of Cambridge University Press.

If all the data sent worldwide each day on the internet were burned onto CDs and these were then piled one on top of the other, the resulting heap would reach Mars and back again. Much of this data is thankfully not stored on CDs but rather much more efficient solid state memories. And at the heart of these is fascinating, some would say weird, fundamental physics that explains a myriad of natural phenomena including alpha particle nuclear decay, nuclear energy generation in stars, the origin of chemical elements, and experimental high energy physics.

The memory at the heart of this data revolution is NAND Flash. It is the nonvolatile (where data remains even with no power supplied) solid state storage found in mobile phones, solid state drives and data centers. It forms the largest segment in the total semiconductor industry with annual sales of tens of billions of dollars. NAND Flash fabrication plants alone cost several billions of dollars to build.

Every time data is written to and erased from NAND Flash, a mechanism is used that is one of the most surprising and successful predictions from Quantum Mechanics. Barrier penetration, also known as tunneling, allows a low energy particle to penetrate a high potential energy barrier.

The 1920’s saw the discovery of Quantum Mechanics. Tunneling was discovered in 1927 to explain molecular spectra. In 1928, electron emission from metals using intense electric fields was found to be an example of tunneling. Alpha particle emission during radioactive disintegration was also shown to be a perfect example of Quantum Mechanical tunneling. The 1930’s saw the application of tunneling to explain the origin of chemical elements and nuclear energy generation in stars.

The invention of the silicon field effect transistor around 1960 was followed by field effect devices in the late 1960’s where charge could tunnel through the gate oxide and be trapped between the gate and the channel to alter the device’s threshold voltage. Trapping within an insulator came first and was followed by charge storage on a floating conductor. Various silicon nonvolatile memory devices were made over the next 20 years that involved tunneling.

NAND Flash was invented in 1988 using 1 micron (um), equal to 1000 nanometers (nm), minimum feature sizes. After almost 30 years of continuous shrinking, this 2-D NAND approach has halted at about 15 nm minimum feature size.

Various forms of 3-D NAND are now being introduced to get around problems of increasing memory density in 2-D.

The success of all NAND Flash depends on the tunneling mechanism that was discovered 90 years ago, applied to silicon devices 50 years ago and specifically to NAND 30 years ago.

Not many engineers working in the silicon semiconductor industry may know about the long history of tunneling. Also, many physicists who are well acquainted with the topic may not be aware of how fundamental it is in the everyday practicalities of storing photos and videos on mobile phones and digital cameras. In addition, tunneling-based Flash memory is starting to displace magnetic hard drive storage in the data centers where the digital data behemoths (Facebook, Amazon, Apple and Google) store internet information.

The purpose of this article is to convey the sense of wonder surrounding Quantum Mechanical tunneling as it is applied to silicon memory devices that are at the heart of the data storage revolution and to put its importance into historical context.

I have used two excellent books as reference:

Gurney’s work is a marvelous description using graphical methods that aid in understanding.

Longair’s superb book goes into far more depth and includes the historical rise of Quantum Mechanics, an approach I have tried to apply in this article when describing the invention of silicon devices.

To investigate the first applications of Quantum Mechanical tunneling to silicon devices, I have been extremely fortunate to be able to visit the Computer History Museum’s archive at the Shustek Center in Fremont, California. I include excerpts from original laboratory notebooks showing some of the first uses of Quantum Mechanical tunneling in silicon memory devices by the pioneers in what was to become Silicon Valley.

This article shows how the data storage revolution is built upon 90 years of fundamental physics applied for 50 years to silicon memory devices. A truly solid foundation.

There are four parts to this article:

  1. The Fundamentals and Early History of Tunneling.

2. The Invention of Tunneling-Based Flash Memory.

3. The Invention of NAND Flash.

4. The Future of Nonvolatile Memory.

Acknowledgements are given at the end to people, companies and institutions that have been instrumental in helping me complete this article.

1. The Fundamentals and Early History of Tunneling

A gem of a book that uses graphical methods to “present the principles in a form congenial to the experimentalist”. © Cambridge University Press. Reprinted with the permission of Cambridge University Press.

The mid 1920’s were the miracle years for Quantum Mechanics. The “Old Quantum Theory” originating with Niels Bohr, had reached crisis point by the end of 1924. Wave-particle duality from Einstein and de Broglie called for something new.

The great theorists, Heisenberg, Born, Jordan, Schrödinger, and Dirac, published different formulations of a new theory that were quickly shown to be equivalent descriptions of Quantum Mechanics. It did not take long before this new theory was being used to explain unusual phenomena.

“Among all the successes of Quantum Mechanics as it evolved in the third decade of he 20th century, none was more impressive than the understanding of the tunnel effect”. So wrote E. Merzbacher in 2002.

“Though I speak with the mathematical tongues of men and of angels, and have not physical intuition, I am become as sounding brass, or a tinkling cymbal,” with apologies to St. Paul.

A graphical method works wonders to develop a physical intuition for tunneling. An excellent book for this is “Elementary Quantum Mechanics” by Ronald Gurney who was one of the first to apply the new mechanics and specifically tunneling to radioactive nuclear disintegration.

Figure 1: Diagram from Gurney showing a particle of total energy W confined to a bucket defined by a potential energy V given by the curve O-P-Q-R (Fig.5, p.6, Gurney, 2nd ed., 1940). © Cambridge University Press. Reprinted with the permission of Cambridge University Press.

Figure 1 above shows a particle confined to a potential energy bucket where its total energy W is less than the potential energy V at the top of the bucket walls but greater than the potential energy within the bucket. The horizontal direction shows position and the vertical direction the energy.

In the new mechanics, de Broglie had proposed that particles have wave properties. Schrödinger thus came out with his wave equation after being encouraged by P. Debye. In Gurney’s marvelous description, “Schrödinger hit on the idea that an equation whose solutions are de Broglie waves where W > V might also give reasonable results where W < V. Figure 2 shows his equation.

Figure 2: Schrödinger’s (time-independent) wave equation for a particle with total energy W in a potential energy V where m is the particle’s mass and h is Planck’s constant. (Equation 2, p.16, Gurney, 2nd ed., 1940). © Cambridge University Press. Reprinted with the permission of Cambridge University Press.

The “thing” that “waves” and is a solution of Schrödinger’s equation is called ψ (“psi” in Greek). Although the wave equation came from Schrödinger, the correct interpretation of ψ came from Born.

It turns out that ψ² is proportional to the probability of finding the particle at any particular position in space. This then connects the strangeness of Quantum Mechanics to actual experimental measurements.

A possible Schrödinger wave pattern solution (time-independent for the purists) for the particle with energy W in the potential energy bucket of Figure 1 is shown in Figure 3.

Figure 3: (a) A possible pattern for the wave function ψ for the particle with energy W in potential energy bucket given in Fig.1. (b) The corresponding pattern for ψ² which is proportional to the probability of finding the particle at any particular position. The vertical dashed lines are the positions of the edges of the potential energy bucket shown in Fig.1. (Fig.12, p.17, Gurney, 2nd ed., 1940). © Cambridge University Press. Reprinted with the permission of Cambridge University Press.

ψ is the wave function pattern while ψ² is the square of its value.

In general, the wave function ψ is a complex number and ψ² is the square of its modulus which is a real number. In our simplified analysis, following Gurney’s approach, we treat the wave function as a real number too.

Notice in Figure 3 ψ² is not zero outside the potential energy bucket but rather decays exponentially towards zero as we get further from the bucket.

Let’s take a closer look at that in Figure 4.

Figure 4: Close -up of what happens at the edge of the potential energy bucket. Quantum mechanics allows the particle to be found outside the bucket since ψ² is not zero and is proportional to the probability of finding the particle at any particular position. © Cambridge University Press. Reprinted with the permission of Cambridge University Press.

In other words, Quantum Mechanics allows a particle to move through a barrier.

As Gurney writes, “the classical division into allowed and forbidden regions disappears”.

The barriers in Figure 1 beyond Q to the right and beyond P to the left stretch to infinity. The probability of finding the particle quickly dies off outside the classically allowed regions as see in Figure 4. These barriers have become “fuzzy” and “diffuse” rather than sharp.

Understanding tunneling is but a small step from where we are now.

Figure 5: Classically allowable regions separated by barriers. (a) The particle has total energy W while the potential energy V rises to a maximum above W and then falls again. (b) A particle of energy W is incident upon a potential energy wall separating two classically allowable regions. A possible pattern for the wave function “intensity” ψ² ifor the particle with energy W. Notice the exponential decay within the barrier but then “leakage” through the barrier to the right. (Fig.43, p.80, Gurney, 2nd ed., 1940). © Cambridge University Press. Reprinted with the permission of Cambridge University Press.

Figure 5 shows how a particle can Quantum Mechanically tunnel through a barrier that classically it could never get through. The barrier is thin enough such that the exponential decay of ψ² within the barrier has not reached zero. The particle starts out on the left hand side (large amplitude ψ² = high probability of finding it here). The barrier exponentially reduces the amplitude but the particle is found on the right hand side (small amplitude ψ² = low probability of finding it here).

And that’s tunneling.

One of the first applications of Quantum Mechanical tunneling, and one that we shall return to later as it applies to silicon memory devices, was in the emission of electrons from metals in intense electric fields. Two famous physicists worked on this topic in 1928, Ralph Fowler (Lord Rutherford’s son-in-law) and Lothar Nordheim.

Figure 6: Excerpts from Fowler and Nordheim, Proc. Royal Society, Series A, 119, p.173 (1928) showing electron emission from metals in intense electric fields as an example of Quantum Mechanical tunneling. Schrödinger’s equation is shown applied to the right and left of the barrier in (ii).

Figure 6 shows extracts from the Fowler-Nordheim paper from 1928. Their Figure 1 (i) shows an electron in a metal approaching the edge of the metal and finding a potential energy barrier. This is similar to our Figure 1 above. Without any external electric field, this barrier goes on to infinity and, as we have seen in our Figures 3 and 4, the probability of finding the electron outside the metal rapidly decays towards zero.

However, Fowler-Nordheim’s Figure 1 (ii) shows what happens to the potential energy curve when an external electric field is applied. Suddenly we get a triangular barrier where the width of the barrier for any electron is dependent on the strength of the field. Stronger fields result in narrower barriers which mean higher probability of tunneling out.

One of the most famous applications of tunneling and indeed the first time Quantum Mechanics was applied to the atomic nucleus was for α-particle nuclear disintegration.

Figure 7: Excerpts from Gurney and Condon, Nature 122, p.439 (1928) showing α-particle nuclear disintegration as an example of quantum mechanical tunneling.

Ronald Gurney and Edward Condon, almost simultaneously with George Gamov, explained the strange behavior of α-particle nuclear disintegration by solving Schrödinger’s wave equation with a potential energy curve given in Figure 7.

The α-particle has a total energy given by the height of DF above the X-axis. We have seen that possible wave patterns can leak through the barrier at DB and FH. The higher the energy of the α-particle, the narrower is the barrier and the more likely the particle will tunnel out.

Many other diverse phenomena have been shown to be driven by Quantum Mechanical tunneling. Both Longair’s book and Merzbacher’s article provide fascinating background on these.

For our story, we must move forward to the 1960’s and the rise of silicon-based microelectronics.

2. The Invention of Tunneling-Based Flash Memory

M. Lenzlinger laboratory notebook, p.6, Dec.12, 1967 (#764), 1967–1970, Fairchild Semiconductor notebooks and technical papers, Box 36, Catalog #102722994. Reproduced with the permission of Computer History Museum (Shustek Center, Fremont, California).

In 1956, William Shockley, shared the Nobel Prize in physics with J. Bardeen and W.H. Brattain, all at Bell Laboratories, “for their researches on semiconductors and their discovery of the transistor effect”. The prize was based on their 1940’s work on the point contact transistor that evolved into the junction bipolar transistor. The more important (from a practical point of view) field effect transistor had not yet been made.

In his Nobel Prize Lecture, Shockley stated “it seems highly probable that once the phenomena of surface states are thoroughly understood from a scientific point of view, many useful suggestions will arise as to how this knowledge may be employed to make better devices”. This stands out as a massive understatement given the fact that the silicon microelectronic revolution is built on the invention of the field effect transistor that depended on the control and passivation of surface states.

At the end of the 1950’s, Bell Laboratories in New Jersey had already established itself as the center for semiconductor research and development. Practical implementations of the field effect transistor, originally invented by J.E. Lilienfeld in 1925 and O. Heil in 1934, had been elusive until it was found that oxidation of a silicon surface resulted in a silicon dioxide (glass) layer that was stable, had a high dielectric strength and passivated the silicon surface by removing the effects of charged surface states. This then allowed an external transverse (perpendicular to the surface) electric field to modify the electrical conduction properties close to the silicon surface.

Figures 8 and 9 show excerpts from D. Kahng and M.M. Atalla’s silicon field effect transistor patents. Both worked at Bell Laboratories.

Figure 8: D. Kahng’s silicon field effect transistor patent with drain (13), source (14), gate (21), gate silicon dioxide (19), surface conducting channel (23). The device is a p-type Metal-Oxide-Semiconductor (PMOS) device.
Figure 9: M.M. Atalla’s silicon field effect transistor patent with a similar structure to Kahng’s description in Figure 7. This device is an n-type Metal-Oxide-Semiconductor (NMOS) device.

The invention of the silicon field effect transistor in 1960 started a race to develop integrated circuits and new types of devices that could be used as semiconductor memory.

The first nonvolatile (retaining their memory state without external power) memories based on charge storage within the field effect transistor started to make their appearance in 1967.

The general memory concept involves storing charge between the gate electrode (“87” in Figure 9) and the surface channel (“91” in Figure 9). This stored charge changes the “threshold voltage” of the transistor, defined as the gate electrode voltage (with respect to the source electrode — “86” in Figure 9) at which appreciable current starts to flow in the channel between source and drain (between “86” and “84” in Figure 9).

The silicon field effect transistor acts as an electrometer to measure the stored charge.

Two main nonvolatile memory concepts arose at about the same time across several laboratories:

  • Storage of charge in a thin film of silicon nitride between gate and channel.
  • Storage of charge in a “floating gate” between gate and channel.

Figure 10 shows the first report, in 1967, of the silicon nitride approach that became known as “MNOS” (Metal-gate, silicon Nitride, silicon diOxide, Silicon). Charge tunneled through the silicon dioxide layer into and out of “traps” in the silicon nitride layer. The presence or absence of this charge was read out by determining the threshold voltage of the field effect transistor.

Figure 10: H.A.R. Wegener et al, International Electron Devices Meeting, Oct. 1967. Charge is stored in a silicon nitride layer that is spaced from the silicon channel region by a thin silicon dioxide layer. Charge tunnels in and out of the silicon nitride layer.

Figure 11 shows a variation of the silicon nitride approach called “MONOS” (Metal-gate, silicon diOxide, silicon Nitride, silicon diOxide, Silicon) that was reported in 1968. Note the statement “This phenomenon has been explained as electron tunneling from the semiconductor through the oxide into the traps in the nitride”.

Figure 11: B.V. Keshavan and H.C. Lin, International Electron Devices Meeting, Oct. 1968. Charge is stored in a silicon nitride layer that is sandwiched between the metal gate electrode and the silicon channel by two thin silicon dioxide layers. Charge tunnels in and out of the silicon nitride layer.

Figure 12 shows the first report, in 1967, of the floating gate approach. Note the energy band diagrams showing (from left to right) the silicon (n-type), a thin silicon dioxide tunneling layer, a floating conductor, a thicker dielectric layer and a metal gate electrode. Note also the explicit use of the Fowler-Nordheim tunneling equation. Interestingly, the arrow in the Figure showing the tunneling of electrons is strictly speaking direct tunneling and not Fowler-Nordheim.

Figure 12: D. Kahng and S.M. Sze, Bell Labs Technical Journal, July 1967. The first floating gate nonvolatile memory device. Fowler-Nordheim tunneling is used to explain the charging and discharging of the floating gate.

Fairchild Semiconductor, set up by the “Traitorous Eight” who had problems working with William Shockley, had started work on the “MOS” (Metal-silicon diOxide-Semiconductor) system in 1963. This included extensive work on the physics of tunneling in the two silicon nonvolatile memory concepts between 1967 and 1969.

Edward Snow at Fairchild published a paper in Solid State Communications in October 1967 (received July 1967). Figure 13 shows excerpts from his “Fowler-Nordheim Tunneling in SiO2 Films”.

Figure 13: Edward Snow’s October 1967 paper on Fowler-Nordheim tunneling in silicon dioxide. No mention was made in the paper of nonvolatile memories but rather its potential use in “cold cathodes”.

In about 1967, Martin Lenzlinger joined Fairchild reporting to Edward Snow in the surface physics group.

Figure 14 shows excerpts from Lenzlinger’s laboratory notebook in late 1967.

Figure 14: Excerpts from Martin Lenzlinger’s laboratory notebook at Fairchild in late 1967. Fairchild Semiconductor notebooks and technical papers, Box 36, Catalog #102722994. Reproduced with the permission of Computer History Museum (Shustek Center, Fremont, California).

Lenzlinger was studying the conduction properties and breakdown in thermally grown silicon dioxide. After “burning” away weak spots in the oxide (in a fuse-like manner), he managed to reproduce the Fowler-Nordheim tunneling conduction that Snow had achieved with magnesium as the capacitor metal electrode and extended it to aluminum as the electrode.

Figure 15 shows the “Fowler-Nordheim plot” from Lenzlinger’s laboratory notebook of December 1967 where the y-axis is the logarithm of the (current density divided by the square of the electric field) and the x-axis is the inverse of the electric field.

Figure 15: Fowler-Nordheim plot from Martin Lenzlinger’s laboratory notebook at Fairchild in December 1967. Fairchild Semiconductor notebooks and technical papers, Box 36, Catalog #102722994. Reproduced with the permission of Computer History Museum (Shustek Center, Fremont, California).

Lenzlinger’s work resulted in two papers appearing in 1969 in the Journal of Applied Physics.

Figure 16 is the “Lenzlinger and Snow” paper describing Fowler-Nordheim tunneling in thermally grown silicon dioxide.

Figure 17 is the “Frohman-Bentchkowsky and Lenzlinger” paper describing electron tunneling into and out of a silicon nitride storage layer. The conduction through the silicon dioxide layer is Fowler-Nordheim tunneling.

Figure 16: Fowler-Nordheim in silicon dioxide from Lenzlinger and Snow in Journal of Applied Physics January 1969.
Figure 17: Charge transport in silicon dioxide/silicon nitride sandwich layers from Frohman-Bentchkowsky and Lenzlinger in Journal of Applied Physics July 1969.

These fundamental studies in the late 1960’s, focusing on the two types of charge storage in a MOSFET (Metal-Oxide-Semiconductor-Field-Effect-Transistor), silicon nitride-based and floating conductor-based, set the scene for a proliferation of further work and the first silicon integrated circuit nonvolatile memory products within the next decade and laid the foundation for the rise of NAND Flash and the solid state data storage revolution.

3. The Invention of NAND Flash

First comprehensive paper reporting the NAND Flash invention where Fowler-Nordheim tunneling is used for program and erase of the memory. M. Momodomi et al., International Electron Devices Meeting 1988.

After the fundamental studies in the late 1960’s Quantum Mechanical tunneling started to appear in silicon integrated circuit products as the program and erase mechanism.

Figure 18 shows excerpts from Eli Harari’s 1978 patent on the silicon electrically erasable nonvolatile semiconductor memory where Fowler-Nordheim tunneling through a thin tunnel oxide to and from a MOSFET floating gate is used as the program and erase mechanism. This was the practical implementation of D. Kahng and S.M. Sze’s floating gate concept shown in Figure 12.

Figure 18: Eli Harari’s Electrically Erasable Nonvolatile Semiconductor patent that used Fowler-Nordheim tunneling to and from a floating gate (56) through a tunnel oxide (59). The result of the stored charge on the floating gate is a shift in the MOSFET threshold voltage as measured between the gate (62) and the source (44 and 64).

Figure 18 shows the fundamental elements common to all silicon nonvolatile memories relying on charge storage, namely:

  • A MOSFET whose threshold voltage depends on charge stored in a reservoir (56) located between the MOSFET gate (62) and the silicon channel (48).
  • A mechanism to change the amount of charge stored in the reservoir and therefore the MOSFET threshold voltage. In Figure 18, this mechanism is Fowler-Nordheim tunneling.
  • The design of the MOSFET memory such that the stored charge remains in the reservoir without external power applied.

The use of the floating gate concept started to become the dominant approach for charge storage in silicon nonvolatile memory products in the late 1970’s and early 1980's. Nevertheless, charge storage in a silicon nitride layer remained as the preferred method among several companies. We shall see shortly how silicon nitride is now making its return in the most advanced nonvolatile memories.

More than 20 years after D. Kahng and S.M. Sze’s floating gate concept, the application of Fowler-Nordheim tunneling for both program and erase in a very area-efficient memory cell came in 1988 with the invention of NAND Flash.

Figure 19 shows excerpts from Toshiba’s first NAND Flash paper where Fowler-Nordheim tunneling was used for both program and erase.

Figure 19: Toshiba’s first NAND Flash paper where Fowler-Nordheim tunneling was used for both program (also called Write) and erase. M. Momodomi et al., International Electron Devices Meeting 1988.

NAND Flash has become the dominant approach for solid state data storage. Three reasons for this stand out:

  • NAND Flash is extremely area-efficient since area-sapping metal contacts are used sparingly. For example, in Figure 19, half a contact per string is used to connect to the bitline and half a contact per string to connect to the ground line.
  • Methods had been invented around the time of NAND’s introduction to store more than one electrical bit per cell by controlling the number of electrons that tunnel into the floating gate. This multi-state approach effectively increases the digital data density in the NAND chip. Figure 20 shows the introduction of this approach.
  • Techniques at system level had been introduced soon after NAND introduction to control and monitor memory cell damage arising from Fowler-Nordheim tunneling program and erase. Figure 21 shows the first implementation of this. This became known as “System Flash”.
Figure 20: The multi-state approach where the number of electrons stored in the charge reservoir is controlled such that different silicon conductivities are achieved in the MOSFET. In this case, four different levels are shown equivalent to two bits per cell. IDS is the source to drain current and VCG is the control gate voltage.
Figure 21: Fowler-Nordheim causes damage to the tunnel oxide and results in “wearout” of the memory cells. Monitoring and control of this are done using a controller chip. The integrated approach became known as “System Flash”.

Between 1988 and 2016, the NAND Flash cell has been physically shrunk by more than 10000 times. With the multi-state ability of storing three electrical data bits per cell, the effective cell area has been shrunk by more than 30000 times.

Figure 19 above showed a 4 Mbit ( 4 million bits) as the first NAND Flash chip. With tens of thousands of shrink factors over more than 25 years, the latest NAND Flash chips have capacities in the 200 Gbit (200 billion bits) range.

This enormous increase in memory storage capacity coupled to the ability of the silicon semiconductor industry to continuously drive down the costs per bit have resulted in the solid state data storage revolution.

Figures 22 and 23 show high resolution transmission electron micrographs of two of the most advanced NAND Flash chips in the market today. Both are made using 16 nm NAND Flash technologies. The fundamental structure of D. Kahng and S.M. Sze (Figure 12) and E. Harari (Figure 18) is evident with the floating gate buried into a MOSFET structure.

And between the floating gate and the silicon channel, we find the tunnel oxide, the link to the Quantum Mechanical tunneling discovered in the 1920’s, applied to silicon memory devices in the 1960’s, developed through the 1970’s and 1980’s that resulted in the invention of NAND Flash in the late 1980’s and continuously shrunk ever since to reach the enormous data storage capabilities of today.

Figure 22: High resolution transmission electron micrographs of 2-dimensional NAND Flash cells from a 64 Gbit chip made with 16 nm NAND Flash technology. All content © 2016, Chipworks Inc. All rights reserved.
Figure 23: High resolution transmission electron micrographs of 2-dimensional NAND Flash cells from a 128 Gbit chip made with 16 nm NAND Flash technology. All content © 2016, Chipworks Inc. All rights reserved.

4. The Future of Nonvolatile Memory

Concept for 3-dimensional stacking of Flash devices. A thin film field effect transistor with a silicon nitride as charge reservoir and a tunnel oxide. A.J. Walker et al., VLSI Symposium, 2003.

The relentless shrinking of NAND Flash from its inception in 1988 at a transistor gate length of 1000 nm to about 14 nm in the most advanced form at the time of writing has led to serious challenges that have stalled this progress.

An indication of this can be seen in Figure 24 where even single electrons stored on the floating gate have measurable effects on the conductivity of the inherent MOSFET.

Figure 24: The number of electrons stored on the floating gate of a 2-dimensional NAND Flash cell that causes a 100 millVolt threshold voltage shift. At the 16 nm NAND Flash level, less than 10 electrons will cause this shift. K. Prall and K. Parat, International Electron Devices Meeting, 2010.

The resultant threshold voltage distributions are unstable due to electron loss and electric field lines resulting from charges not stored in the floating gate.

This had led to the invention of various forms of nonvolatile devices that can be stacked in a 3-dimensional form to increase storage capacity without having to rely completely on lateral shrinking.

Figure 25 shows memory cells in a 3-dimensional NAND Flash. Although the approach looks very different from a 2-dimensional NAND such as in Figures 22 and 23, the fundamentals are the same: a charge storage reservoir and a field effect transistor.

The structure is a Gate-All-Around thin film transistor with an vertical annulus as a channel.

The charge is stored in a silicon nitride layer that is separated from a thin film transistor channel. The channel is made of a deposited layer of polycrystalline silicon. Charge tunnels through a thin tunnel dielectric layer between the channel and the silicon nitride for program and erase. This tunnel dielectric is made up of layers of silicon dioxide and nitride.

Charge storage affects the conductivity of the transistor channel which can then be sensed in the same way as all the previous MOSFET-based nonvolatile memories.

The cell is much larger than the 2-dimensional NAND cell shown in Figures 22 and 23. The total number of electrons stored in the silicon nitride reservoir is therefore much greater resulting in more stability in the threshold voltage.

Figure 25: 3-dimensional NAND Flash (Samsung 86 Gbit V-NAND) with vertical polycrystalline silicon annulus as channel and charge storage in a reservoir of silicon nitride concentric with the channel and separated from it by a tunnel dielectric. The cross section transmission electron micrographs show the real structure. All content (except colored drawings) © 2016, Chipworks Inc. All rights reserved.

At the time of writing, such 3-dimensional NAND chips have been incorporated in the latest products. NAND Flash manufacturers have products with 48 layers and have 64 layers on the horizon.

The two original 1960’s approaches to charge storage are represented in the new 3-dimensional NAND Flash, namely silicon nitride as shown in Figure 25, and also floating gate developed by others.

And of course, Quantum Mechanical tunneling remains as the foundation for the storage of data.

The challenge for the NAND Flash manufacturers is to continue increasing memory densities with lower cost per memory bit. While great strides have been made over almost 30 years with the last 3 years taken up with conversions to 3-dimensional NAND , challenges have arisen that may impede progress.

One such challenge associated with tunneling is the wear out of the memory cell after program and erase cycling. This arises from the fact that Fowler-Nordheim tunneling creates damage in the tunnel dielectric. This can cause unwanted charge trapping and memory retention issues.

As a result, various 3-dimensional concepts are being investigated that use a form of Quantum Mechanical tunneling that had been investigated in the early 1970’s. These rely on direct, not Fowler-Nordheim, tunneling through the tunnel dielectric. This creates far less damage and allows greater program and erase cycling.

Figure 26 shows two of these concepts along with the original energy band diagram from 1973.

Figure 26: Concepts using direct tunneling through the tunnel oxide to reduce memory cell wear out from A.J. Walker et. al., VLSI Symposium 2003 and A.J. Walker, IEEE Transactions on Electron Devices, November 2009. Energy band diagram from N. Gordon and W.C. Johnson, IEEE Transactions on Electron Devices, March 1973.

Quantum Mechanical tunneling has formed the foundation for silicon nonvolatile memory storage for almost 50 years. Its incorporation in NAND Flash 30 years ago has driven the digital data storage revolution. New memory cell concepts based on tunneling are being investigated. In addition, many new types of nonvolatile memories are being touted as replacements for NAND Flash. Many of these do not use Quantum Mechanical tunneling.

It remains to be seen how the solid state storage industry now evolves. Has Quantum Mechanical tunneling had its day or are we on the threshold of further tunneling evolution?


I would like to thank the following people, companies and institutions for their help in putting together this article. Any errors remaining are all mine.

Professor Malcolm Longair CBE, FRS, FRSE, Emeritus Jacksonian Professor of Natural Philosophy at the University of Cambridge for reviewing my section on Quantum Mechanics.

Eli Harari, founder of SanDisk, for great discussions on the early days of Flash cell development and the rise of System Flash and SanDisk.

Dick James at Chipworks for allowing me to use their beautiful transmission electron micrographs of the most advanced 2- and 3-dimensional NAND Flash cells.

The Shustek Center at The Computer History Museum for making their archive accessible to me. I had the honor of seeing Martin Lenzlinger’s laboratory notebook when he was at Fairchild.

Cambridge University Press which was so kind as to allow me to reproduce figures from R.W. Gurney’s Elementary Quantum Mechanics book.