What are Data/Clock Fanout Buffers?

Active clock distributors/fanout buffers are an effective way to distribute clock around a given system. As opposed to a passive approach, an active solution is broadband and provides amplification/signal restoration when needed. An active approach is much smaller in size and can be used as an additional driver of large downstream loads.

The ASNT5023-PQC from ADSANTEC is an 1 to 4 active clock splitter that is working up to 28Gb/s. The fanout buffer takes a single input signal and distributes it to four separate output ports. Due to the high symmetric design of the IC, all four outputs are perfectly in phase with each other. The part utilizes CML for its I/Os with internal 50ohm termination where they can be used differentially, single-ended, or a combination of the two. The I/O ports work DC or AC coupled. Since the part is intended to be utilized with input data signaling as well as clock signals, the output buffer is designed specifically to minimize any additive pk-pk data dependent jitter.

The clock distributor is intended to be used in test and measurement equipment. It’s also very handy in a R&D laboratory environment when multiple clock or data signal copies are needed. The clock buffer is a perfect solution to route a system’s clock to several different locations. One example of the part in use is when people have several ADCs functioning in parallel and each need a clock signal that are in phase with each other to reduce aperture jitter.

The low cost fanout buffer is small in size and comes in a very easy to work with standard QFN package.