Quick head-ups during SystemVerilog coding…

If you ever get into trouble trying to get your heads around variable assignment within generate struct, below may be a potential solution…

I was stuck in finding way to assign value to variable (genvar) within for loop within generate struct for a few days, and that link helped me a lot.

2. 30/06/2015

Very small or even trivial tips… Please remember to check the looping condition for your for loop. You may almost scratch all your hairs off before realising a stupid silly mistake is hidden in the condition… Please be aware.

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