Understanding 8085 Instruction Set and Assembly Language Programming

The 8085 microprocessor is a fundamental component in the realm of computer architecture, renowned for its versatility and widespread application. One of the crucial aspects of programming and utilizing the 8085 microprocessor is comprehending its instruction set and mastering assembly language programming. In this comprehensive guide, we will delve into various facets of the 8085 instruction set and assembly language programming, addressing key questions and providing elucidating examples.

1. Classification of the 8085 Instruction Set

The instruction set of the 8085 microprocessor is classified into various categories, each serving distinct purposes. For instance:

• Data transfer instructions: MOV, MVI, LXI
• Arithmetic instructions: ADD, SUB, INR
• Logical instructions: AND, ORA, XRA
• Control transfer instructions: JMP, CALL, RET
• Input/output instructions: IN, OUT
• Special purpose instructions: HLT, NOP, RIM, SIM

2. Elements of an Instruction

An instruction in the 8085 microprocessor comprises several elements, including:

1. The opcode.
2. Operand.
3. Addressing mode.
4. Length.

3. Instruction Formats for 8085

The 8085 microprocessor supports various instruction formats, such as

1. register addressing.
2. Direct addressing.
3. Indirect addressing.
4. Immediate addressing.

4. Opcode Format for 8085

The opcode format for the 8085 microprocessor typically consists of an operation code followed by additional bits to specify addressing modes and operands.

5. Data Formats Supported by 8085

The 8085 microprocessor supports different data formats, including

1. Binary.
2. Decimal
3. Hexadecimal
4. ASCII.

6. Effect of Specific Instructions in 8085

Let’s explore the effects of specific instructions in the 8085 microprocessor through examples:

• LHLD addr: Load HL pair direct
• ADD M: Add memory to accumulator
• RST 4: Call subroutine at address 20H
• XTHL: Exchange HL with stack top
• DAA: Decimal adjust accumulator
• CP 2000: Compare accumulator with immediate data
• DAD B: Double add BC to HL
• IN 20H: Input data from port 20H
• RIM: Read interrupt mask
• SIM: Set interrupt mask

7. Initialization of Stack Pointer at FFFFH

Two ways to initialize the stack pointer at FFFFH include:

1. Using the LXI instruction
2. Pushing values onto the stack.

8. Comparison of Instruction Pairs in 8085

Let’s compare the pairs of instructions in terms of their opcodes, operations, instruction bytes, addressing modes, affected flags, and results:

(a) MVI A, 00H vs. XRA A

MVI A, 00H:

• Opcode: 3E 00
• Operation: Move immediate data 00H to accumulator
• Instruction bytes: 2
• Addressing mode: Immediate
• Affected flags: All flags except the carry flag are affected.
• Result: The accumulator (A) is loaded with the value 00H.

XRA A:

• Opcode: AF
• Operation: Exclusive OR accumulator with itself
• Instruction bytes: 1
• Addressing mode: Register
• Affected flags: All flags are affected.
• Result: The accumulator (A) is set to 00H.

(b) SUB B vs. CMP B

SUB B:

• Opcode: 90
• Operation: Subtract register B from the accumulator
• Instruction bytes: 1
• Addressing mode: Register
• Affected flags: All flags are affected.
• Result: Subtract the value in register B from the accumulator.

CMP B:

• Opcode: B8
• Operation: Compare register B with the accumulator
• Instruction bytes: 1
• Addressing mode: Register
• Affected flags: All flags are affected except the carry flag.
• Result: The result of the comparison is stored in the flags register; the accumulator remains unchanged.

© JMP 2700 vs. PCHL

JMP 2700:

• Opcode: C3 00 27
• Operation: Unconditional jump to address 2700H
• Instruction bytes: 3
• Addressing mode: Direct
• Affected flags: None
• Result: Program control is transferred to memory address 2700H.

PCHL:

• Opcode: E9
• Operation: Jump to the address specified by the HL register pair
• Instruction bytes: 1
• Addressing mode: Register
• Affected flags: None
• Result: Program control is transferred to the address specified by the HL register pair.

(d) XTHL vs. SPHL

XTHL:

• Opcode: E3
• Operation: Exchange stack top with HL register pair
• Instruction bytes: 1
• Addressing mode: Register
• Affected flags: None
• Result: The contents of the HL register pair are exchanged with the contents of the stack pointer.

SPHL:

• Opcode: F9
• Operation: Load HL register pair with the stack pointer value
• Instruction bytes: 1
• Addressing mode: Register
• Affected flags: None
• Result: The HL register pair is loaded with the value of the stack pointer.

(e) LDA 2000H vs. LHLD 2000H

Opcode:

• LDA 2000H: 3A 00 20
• LHLD 2000H: 2A 00 20

Operation:

• LDA 2000H: Load accumulator with data from address 2000H
• LHLD 2000H: Load HL pair with data from address 2000H (and the next memory location)

Instruction Bytes:

• LDA 2000H: 3 bytes
• LHLD 2000H: 3 bytes

Addressing Modes:

• LDA 2000H: Direct
• LHLD 2000H: Direct

Affected Flags:

• LDA 2000H: None affected
• LHLD 2000H: None affected

Results:

• LDA 2000H: Accumulator loaded with data from address 2000H
• LHLD 2000H: HL pair loaded with data from address 2000H and the next memory location

(f) RRC vs. RAR

Opcode:

• RRC: 0F
• RAR: 1F

Operation:

• RRC: Rotate accumulator right through carry
• RAR: Rotate accumulator right with carry

Instruction Bytes:

• RRC: 1 byte
• RAR: 1 byte

Addressing Modes:

• Both: Register

Affected Flags:

• Both: Carry flag affected

Results:

• RRC: Accumulator rotated right through carry
• RAR: Accumulator rotated right with carry

9. Execution of JNZ Instruction

How many times will the two JNZ instruction be executed in the following sequence? What will be the contents of H and L when the program control reaches to HLT instruction? :

— — — — — — — - LXI H, 0503H;

— — — — — — — - DCR L;

— — — — — — — — JNZ LOOP;

LOOP :

— — — — — — — — DCR H;

— — — — — — — — — JNZ LOOP;

— — — — — — — — - HLT.

Let’s analyze the code step by step:

1. Initialize H and L registers with 0503H.
2. Decrement L.
3. Check if L is zero. If not zero, jump to LOOP label.
4. Decrement H.
5. Check if H is zero. If not zero, jump to LOOP label.
6. Halt the program.

Now, let’s break it down further:

Initially, H = 05 and L = 03.

First loop:

• Decrement L from 03 to 02. (L = 02)
• Since L is not zero, jump back to LOOP.
• Decrement H from 05 to 04. (H = 04)
• Since H is not zero, jump back to LOOP.

Second loop:

• Decrement L from 02 to 01. (L = 01)
• Since L is not zero, jump back to LOOP.
• Decrement H from 04 to 03. (H = 03)
• Since H is not zero, jump back to LOOP.

Third loop:

• Decrement L from 01 to 00. (L = 00)
• Since L is zero, do not jump back to LOOP.
• Decrement H from 03 to 02. (H = 02)
• Since H is not zero, jump back to LOOP.

Fourth loop:

• Decrement L from 00 to FF (because it’s an 8-bit register, it wraps around). (L = FF)
• Since L is not zero, jump back to LOOP.
• Decrement H from 02 to 01. (H = 01)
• Since H is not zero, jump back to LOOP.

Fifth loop:

• Decrement L from FF to FE. (L = FE)
• Since L is not zero, jump back to LOOP.
• Decrement H from 01 to 00. (H = 00)
• Since H is zero, do not jump back to LOOP.

The JNZ instruction is executed a total of 5 times. When the program control reaches the HLT instruction, the contents of H and L are H = 00 and L = FE.

To be Continued