[Day-1] Everything about Class

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We are going to dedicate this 10-day series to answering 3 basic questions every time starting today.

1. What?

2. How?

3. Why?

So, let’s start with today’s discussion with “class”

What is class?

class is a user-defined data type in SystemVerilog that consists of data, functions, and tasks.

Now, this is a commonly known and found answer about class. Let’s dig a little deeper into this definition and try to understand what “user-defined data type” means here.

Step 1 for understanding “user-defined data type” is to understand “data type” well. I am expecting the reader here to know a little knick-knack of coding and thus, I believe you must have used “int”, “string” etc keywords to create a variable in C/C++ or SystemVerilog as well. So, what does “int” or “string” mean here? These are some defined, known data types. What these do is help allocate memory space for the value, that is of a particular property (integer value or string of characters) when the code runs.

For example, the code below will create a memory space only for storing an integer.

int a;

Here “a” is the address of the memory space where we are going to store our integer value.

Easy and simple.

And…

class is also something like this!

It manages the data, functions, and tasks defined inside it. Just like a data type “int”. The only difference is that “int” is a known or defined data type, and “class” is a user-defined data type.

So, a class should also be given a name every time its properties are used, just like other data types.

For example, if we create a class something like this:

class base;
 int example_integer;
endclass

We now have a data type named “base”, kind of like “int”. Now we will have to give a name to this data type to use it. And that needs to be done inside of a module.

module tb;
 base base_class_1;
endmodule

So, we have a name base_class_1 to our data type “base”, which is defined by us, meaning, the properties of this class “base” is defined by us.

In SystemVerilog, the name of the class data type, that we used to get the property of our defined class “base”, is called handle.

This means, base_class_1 in the above code snippet is the handle of our base class data type, just like “a” when we define a variable. But there is a catch.

The property of “base” class data type is that this data type will create space for an integer. But there’s a catch.

Even though we have assigned a name to this class, we have not “constructed” this class yet. What does this mean?

It means, so far, we have created a pointer in the memory for our data type “base”, which tells us, where we can find the definition of our data type “base” but we have not put the properties/ definitions of the class members (data, functions, tasks etc) to the memory yet. To do so, we need to “construct” our class in memory. This is done by “constructor”.

What is a constructor now?!

A constructor is a function that puts down the properties defined inside the class data-type in the memory.

The question is, how can we call that function then?

The constructor function is named “new”. So, as soon as we write down “new” as below, the tool will construct the data type in memory as defined in the class “base”.

So in the above example, we will have to construct the data type. It can be done something like this:

module tb;
  base base_class_1; //handle is created here.
  base_class_1 = new(); //Object is created
endmodule

Now we have access to all the class members and if you $display the handle, you will get a memory address that denotes a pointer from where the class is constructed.

The use of a constructor makes an operation called instantiation.

So by book, here by using constructor function new() in the above code snippet, we have instantiated our data type “base” by the handle “base_class_1” in memory. And this instance here is called an “object”.

So this is it. This is all the working knowledge about class and all the Whats, Whys, and Hows of class that is the building block and very fundamental knowledge of Object-Oriented Programming in SystemVerilog. See you tomorrow with a new topic of Object-Oriented Programming. Stay tuned!

The whole SystemVerilog used here should look something like this. Play around with it and mention all the weird cases that you find!

class base;
 int example_integer;
endclass 
module tb;
  base base_class_1; //handle is created here.
  base_class_1 = new(); //Object is created
endmodule

Disclaimer: The knowledge above is true and rigid by the confidence of all the experiments and resources I went through. But it’s not the holy grail of course! I cordially request by connections to add anything that I might have missed while defining class or maybe have mistaken or misinterpreted something. Your cooperation will help me learn and grow more!

If you are new to this article series and kind of lost, I started a 10-day discussion series about Object Oriented Programming using SystemVerilog. Follow the series to learn about my understanding of Object Oriented Programming and add your knowledge as well to make my understanding better in the comments.