Intel just announced their first line of 10nm processors, Ice Lake-U. The die they’re based on contains 4 CPU cores, 64 GPU execution units and new supporting logic such Thunderbolt 3, Wi-Fi 6 and LPDDR4X memory controllers, larger caches and new video and image processors.
In this analysis we look at the size of the overall Ice Lake-U chip, that of the CPU and the GPU. Smaller sizes ensure that more chips fit on a wafer and therefore more can be sold. If there is a lot of space invested in a component, it is important for Intel to score well on it.
Based on the wafer image Intel released as part of their Ice Lake press release, I tried to calculate the die size. Horizontally, their are ~27,2 dies on the wafer, and vertically ~25,4. This results of dimensions of ~11,0 mm and ~11,8 mm, if the unrounded values are multiplied ~130 mm2.
| | ICL 4+2 | CFL 4+2 | CFL 6+2 | CFL 8+2 | CFL 4+3e |
| CPU cores | 4 | 4 | 6 | 8 | 4 |
| GPU EUs | 64 | 24 | 24 | 24 | 48 |
| Process | 10nm | 14nm | 14nm | 14nm | 14nm |
| Die size | 130mm2 | 126mm2 | 150mm2 | 174mm2 | ? |
If someone has a source for the die size of the CFL 4+3e chip (the one with Iris Plus 655), please let me know!
CPU core size
Intel released another image, zoomed in on a portion of the wafer.
In my measurements, a single core including L2 cache is ~1.79 by ~3.99 mm, resulting in ~7.14 mm2 die size. The whole 4-core CPU complex, including L3-cache, measures ~31.34 mm2, so 7.84 mm2 per core. This is down about 34% from 14nm Coffee Lake, which measured about 11.9 mm2.
With Coffee Lake, the 24 execution units measured about 45.6 mm2 on the 14nm process. On 10nm Ice Lake, the 64 execution units only take 40.6 mm2, 11% smaller. Per execution unit, the size even decreased from 1.9mm2 to 0.63 mm2, making the 10nm Gen11 GPU almost exactly 3 times as small per EU.
At 130mm2, Intel’s Ice Lake 4+2 die is quite large for a first chip on a new node. As comparison, the first consumer 14nm chip, a dual-core Broadwell, measured only 82 mm2. A lot of space also looks to be spend on the memory controllers, video encoder, image signal processor and input/output controllers, because only 72mm2 of the 130mm2 is spend on the CPU en GPU clusters.
The CPU core shrunk relatively little, only 34%. This is probably due tot the wider cores (wider decoder, more execution ports, etc.) and larger caches (L1 32 → 48 kB and L2 256 → 512 kB). Ice Lake also adds support for the AVX512 vector extensions, which On a ‘hyper scaled’ node that claims a 2.7x increase in transistor density, this is a heavy price to pay for a 18% higher IPC.
The GPU cluster does almost the opposite to the CPU, shrinking by a factor of 3 per EU. With 2.67 as many executions units as the previous generation, it’s still smaller. This also means Intel found a way to shave of another 10% of EU size aside from the 2.7x increase in transistor density.
All sizes where measured by hand from these two images. Please verify them and let me know if any errors or inaccuracies where made.