AsicVault advanced PCB design

Hando Eilsen
3 min readJan 19, 2020

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AsicVault PCB bottom side without chip, 320-pin BGA
AsicVault PCB, 320-pin ball grid array

In this article we will take closer look at the AsicVault hardware wallet advanced PCB. How is it different from the majority of other hardware wallet PCBs and what are the security advantages?

First, we are using ball-grid-array packages (BGA) for all important chips on our PCB. As you can see from the picture below, the secure chip has over 320 pins and they are all located under the chip. You cannot probe the pins without desoldering the secure chip first.

AsicVault PCB bottom — Altium Designer, High speed PCIe paths
AsicVault PCB bottom side with high speed PCIe paths — Altium Designer

This is also a very fine pitch BGA package where the distance between pins is just 0.5mm.

After desoldering the chip, reballing must be performed and even that is not enough to power it up. Since this chip has several ground and voltage pins, also different voltage levels, all these have to be properly connected. Only practical way of doing it is by using a custom PCB built exactly for this purpose.

AsicVault PCB top — Altium Designer
AsicVault PCB top side with high speed USB3.0 paths — Altium Designer

It must have power supplies for different voltages and all the decoupling capacitors that you see on our PCB picture. We are using tightly packed smallest 0201 components to fit them into this very small PCB. There are over 400 components on our PCB, mounted both to top and bottom sides. To see the true size, you can resize the pictures on the screen so that the width of the PCB becomes 34mm, smallest components will become sub-pixel size.

Secondly, this is the thinnest 0.9mm 8-layer PCB. We have intentionally put minimal routing to the top and bottom layers. All important signals are routed on inner layers of the PCB and are therefore invisible.

AsicVault PCB bottom 3D-view
AsicVault PCB bottom 3D-view
AsicVault PCB top 3D-view
AsicVault PCB top 3D-view

Thirdly, any-layer HDI technology with laser drilled microvias has been used. This means that instead of through-hole vias that always go from top layer to the bottom layer, we are using miniature 0.1mm diameter vias buried inside the PCB. These vias are not visible from outside and you can’t probe them. Since the vias on all layers are also filled with copper we can put them on top of each other. This saves a lot of space for high density interconnect routing. Our small PCB has over 6,400 microvias packed into 1,000 square millimeter space.

AsicVault PCB microvias
AsicVault PCB microvias

AsicVault hardware wallet PCB basically implements the whole cold storage computer motherboard. It has high speed impedance controlled paths for USB3.0 and PCIe. It also has LPDDR RAM and SPI Flash for application CPU.

AsicVault PCB top side
AsicVault PCB top side

Lastly, thanks to the SRAM PUF technology all secrets are completely invisible when the secure chip is powered down. And as soon as you power up the chip, it uses active anti-tamper technologies to detect any intrusion attempts. The whole chip is also covered by metal layer mesh and any tampering event triggers immediate zeroisation of all secrets stored inside the chip.

AsicVault PCB bottom side
AsicVault PCB bottom side

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