STM32H7 External SDRAM Evaluation Board

List of Contents

A. Project Overview

B-1. Schematic Design

B-2. PCB Layout

C. System configuration

D. C Code

E. Result and Conclusion

A. Project Overview

I want to design a board that can evaluate external RAM.

Project includes following specifications:

Hardware requirements

• Core MCU: STM32H753IIT6
• External SDRAM: MT48LC16M16A2P-6A
• Chip OSC — 16Mhz
• Power supply: TPS56120, 9~12vin, 3v3out
• Power supply: from ST link
• 4Layer PCB
• 50ohm impedance matching
• Prevention of signal reflection through damping resistor
• Trace length mathing

Software requirements

• External SDRAM parameter setting
• Initialization of External SDRAM
• Reading and writing memory in external SDRAM

B-1. Schematic Design

B-2. PCB Layout

• Trace width was set to 3.5 mils. It makes about 62.5 ohm impedance.(JLC2313 stack up)
• All SDRAM traces were length tuned to 60mm
• Stitching vias were placed to provide better stability and noise immunity
• BOM file and POS file were generated to request SMT

Things to remember for next design..

• use cheaper TPS561208 buck regulator to reduce cost
• use crystal to reduce cost
• In case the MCU does not respond, the boot pin should be configurable -set boot pin high and re-power to access with st-link

C. System Configuration

MT48LC16M16A2P-6A’s parameters

• FMC clock should not exceed 167 MHz

• Timing parameters were set to meet specs from SDRAM datasheet

D. C Code

• SDRAM should be initialized to start
• Given code access to SDRAM memory area(bank1 starts from 0xC0000000)
• By repetitively reading and writing data, check whether the written value and the read value are the same

E. Result and conlusion

• The PCB was successfully fabricated

• It can be confirmed that the value saved in the designated SDRAM area address and the saved value match
• No error occurred even after reading and writing 10000 times