RAO MUHAMMAD UMER – Medium

RAO MUHAMMAD UMER

RAO MUHAMMAD UMER

Decade Counter Implementation in Verilog

The given Verilog code defines a module named “decade_counter” which implements the functionality of a decade counter. Here’s a breakdown…

Mar 4

Decade Counter Implementation in Verilog

Mar 4

RAO MUHAMMAD UMER

Mod Up-Down Counter Implementation in Verilog

The given Verilog code defines a module named “mod8_up_down” which implements the functionality of a up_down counter. Here’s a breakdown of…

Mar 3

Mod Up-Down Counter Implementation in Verilog

Mar 3

RAO MUHAMMAD UMER

Counter Implementation in Verilog

The given Verilog code defines a module named “counter” which implements the functionality of a counter. Here’s a breakdown of the module:

Mar 2

Counter Implementation in Verilog

Mar 2

RAO MUHAMMAD UMER

Register Implementation in Verilog

The given Verilog code defines a module named “register_64bit” which implements the functionality of a 64bit register.Here’s a breakdown of…

Mar 1

Register Implementation in Verilog

Mar 1

RAO MUHAMMAD UMER

4-Bit Multiplier Implementation in Verilog

The given Verilog code defines a module named “Multiplier_4bit” which implements the functionality of a 4-bit Multiplier. Here’s a…

Feb 29

4-Bit Multiplier Implementation in Verilog

Feb 29

RAO MUHAMMAD UMER

T Flip Flop (Behavioral) Implementation in Verilog

The given Verilog code defines a module named “t_ff” which implements the functionality of a D Flipflop. Here’s a breakdown of the module:

Feb 27

T Flip Flop (Behavioral) Implementation in Verilog

Feb 27

RAO MUHAMMAD UMER

Barrel Shifter Implementation in Verilog

A barrel shifter is a digital circuit used in computer processors to efficiently perform bitwise shifting operations on binary data, either…

Feb 27

Barrel Shifter Implementation in Verilog

Feb 27

RAO MUHAMMAD UMER

D Flip Flop (Behavioral) Implementation in Verilog

The given Verilog code defines a module named “d_ff” which implements the functionality of a D Flipflop. Here’s a breakdown of the module:

Feb 24

D Flip Flop (Behavioral) Implementation in Verilog

Feb 24

RAO MUHAMMAD UMER

D-Latch(Behavioral) Implementation in Verilog

The given Verilog code defines a module named “dlatch_bh” which implements the functionality of an d-latch. Here’s a breakdown of the…

Feb 24

D-Latch(Behavioral) Implementation in Verilog

Feb 24

RAO MUHAMMAD UMER

JK Flip Flop (Behavioral) Implementation in Verilog

The given Verilog code defines a module named “jk_ff” which implements the functionality of a JK Flipflop. Here’s a breakdown of the…

Feb 23

JK Flip Flop (Behavioral) Implementation in Verilog

Feb 23

RAO MUHAMMAD UMER

RAO MUHAMMAD UMER

Undergrad Telecom Engineer | NEDUET'25 | RISC V | SV | RTL | Digital System Design | FPGA | VLSI Enthusiast

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