My journey with the Amaranth HDL

A Table Of Content to serve as a hub to a batch of articles about an HDL named Amaranth-HDL

This article will be updated as I add articles on this subject. Unlinked entries are planned to be written and published.

And you may want to go to the latest post directly : Connecting a logic design to actual pins of the FPGA.

Act 1 — Setting things up

1. Forewords
2. Setting up the computer (Ubuntu Linux)
3. A project to deals with dependencies and fundation code
4. A framework to write test inspired by how it is expressed in javascript/node.js projects
5. Setup a continuous integration workflow
6. [ADDENDUM] A simpler and OS independant setup of the workstation

Act 2 — Generating an HDMI compatible (DVI) frame

1. Understanding the simplified computations of publicly available implementations of TMDS encoding
2. A simple test suite for TMDS encoding
3. Clocking and feeding the video port
4. Generating dummy video data and interleaving video control signals
5. Connecting a logic design to actual pins of the FPGA
6. Putting all together