Comparing ARM Architecture Version ARMv1 to ARMv7

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ARM stands for Advanced RISC Machines and was founded in 1978. It has a range of products, but it is best known for its range of RISC Processor Core Designs.

The real property of the designing of the system is to provide high performance, low cost and power-efficient RISC processor. These properties are the main constraint of embedded systems (ES). Therefore, ARM is widely used micro-controllers in any embedded system design. This had led to the evolution from a bigger microprocessor to a smaller micro-controller.

It is important to know that ARM does not make their chips at all, instead, other companies buy designs from ARM’s engineers and integrate them into their own products. They are free to modify the chips for specific purposes (as apple has been known to do) giving them the flexibility to build the CPU around their device’s design rather than the other way around.

Now we will look at the evolution of ARM architecture:

1. Early Architectures

• ARM v1: First ARM instruction set version released in 1985 which defines a 32-bit ISA along with 26-bit addressing space. The ARMv1 was only implemented by the ARM1 and was replaced soon after by the ARM2. Only a few hundred of those chips were ever fabricated. There are 16 general-purpose 32-bit registers. Did not have support for multiplication and was done using software implementation (Shift and add multiplication) which was very slow. No support was provided for hardware floating-point or an ability to do such operations on an external FPU coprocessor. Not used in any commercial product.
• ARMv2: Second ARM instruction set version released in 1986. Used by ACORN computers. It was not having the RISC instruction set in it. It used to work on the required platform with the required instruction set in it. When it was evolved to RISC instruction set, it is being used further in the domain where it can be platform friendly. So, it can be utilized commercially as well. Added support for multiplication and a coprocessor communication interface. Also adds two additional status registers for a total of 27 registers.
• ARMv3: On-Chip debugging is possible. Full 32-bit addressing capability, with the PC being the complete 32 bits wide and flags in a separate register.Six new processing modes; User32, Supervisor32, IRQ32, FIQ32, Abort32 and Undefined32. CPSR/SPSR — Current and Saved status registers, in addition to MRS and MSR, to read/write them. ARM6 and initial ARM7 used this as a base.

2. Classic Family

• ARMv4: Support for halfword and signed halfword/byte provided. System mode included. Thumb instruction set(v4T). Backwards compatibility with earlier architectures.
• ARMv5: This version improved upon ARM/Thumb Interworking. Support for CLZ instruction introduced. Support for structured arithmetic DSP multiply-accumulate instructions included. Backwards compatibility with earlier architectures.
• ARMv6: SIMD Instructions Multi-processing v6 memory architecture. Unaligned data support included. Extensions included: Thumb-2, TrustZone, Multicore and Thumb only. Backwards compatibility with earlier architectures.

3. Cortex Family

• ARMv7: There is one crucial change in ARMv7, up to this point all cores confirmed to essentially the same architecture or feature set and it became apparent that one architecture couldn’t provide everything, from the tiniest microcontroller to the smartest of smartphones. So, with ARMv7 they introduced architecture profiles:

a. ARMv7-A (Application) - NEON

b. ARMv7-R (Real-Time) - Hardware Divide

c. ARMv7-M (Microcontroller) - Hardware Divide and Thumb-2 only

The diagram above shows which version of the architecture is supported by which range of ARM processor cores.

With all the information above and when starting out with new ARM-based device information like this can help track down which architecture it supports and from that, it is determined which instruction set it has and what feature set it supports. Conversely, when looking to specify a new processor core for a new product knowing what features you need leads you to a particular architecture and from that, it is clear which processor cores support those features.