Zeeshan Rafique
Zeeshan Rafique

I am a computer hardware enthusiast, I have done two RISC-V based SoC tapeouts. My research focus area is converting digital design into GDS through proper verification .

Zeeshan Rafique

Zeeshan Rafique

I am an RTL design engineer with a strong background in Computer Architecture and Digital Logic Design. My research focus area is to improve hardware for AI/ML.