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Applied C++: Memory Latency
Benchmarking Kaby Lake and Haswell memory latency using lists
Modern CPUs are complex beasts with billions of transistors. This complexity in hardware brings indeterminacy even in simple software algorithms.
Let’s benchmark a simple list traversal. An average node access latency corresponds to CPU cache latencies. Or does it? Let’s put it to the test!
“Do I Know This Already?” Quiz
Benchmarking access latency for lists with a different number of nodes. All the lists are contiguous in memory, traversed sequentially, and have a 4 KB padding between the next
pointers.
If we plot on the x-axis the working sets of benchmark iterations, and on the y-axis the node access latencies, how the graph will look on a modern CPU?
- The latency graph will have a few steps matching CPU caches specs.
- The graph will be steeper, and the latency much higher than the specs.