Back 2 BaseCS : OS : Processor Architecture
Parts of the ‘brain’ of the computer ~
CPU is often referred to as the brain of a computer. A human brain is a complex organ. The human brain has evolved over time, with the brain stem, limbic system and cerebellum (parts of brain closest to the spine) evolving first. They are often called the ‘old’ brain. They handle the most basic involuntary and unconscious movements. Balancing, moving, coordination are handled by cerebellum. Limbic system regulates our emotions, fear and fight-or-flight responses. Brain stem is critical to keep us breathing, maintain heart rate and sleep. It is no coincidence that the most primitive parts of the brain are closest to the spine. This makes our quick reflexive motor movements quicker. This is an example of ‘optimization’ by nature.
Our conscious or more developed part of the brain is the frontal cortex containing Cerebrum. It is located on the outer surface or the brain. This is what makes us human, this is our thinking brain. It helps with higher cognitive functions such as reasoning, problem-solving, decision making (think Computing). It also plays important role in memory formation, storage, retrieval (think Memory management). It is also important in language production and fine motor movements (think I/O). The modern CPU design is very similar to this, as you will see soon.
Fun fact : On the motor cortex, a finger takes the same space as our legs. Hence our brain spends the same amount of energy on each finger as it does on our legs. Makes me wonder if our fingers are just like very tiny legs ~
CPU Processor chip designers also face similar design patterns and similar challenges. A simplified diagram below -
Key Components of CPU Architecture
- ALU (Arithmetic Logic Unit): The calculator of the CPU. It handles all arithmetic operations (like addition and subtraction) and logical operations (like comparisons).
- Registers: Tiny, super-fast storage units within the CPU that hold data and instructions temporarily. Think of them as the variables in your code that are readily accessible. They help implement the Fetch Decode Execute cycle discussed in the previous article.
- Control Unit: The conductor of the CPU orchestra. It directs the operations of the ALU, registers, and other components, ensuring everything happens in the right order.
- Cache: A high-speed memory layer that stores frequently accessed data and instructions, reducing the time it takes to fetch them from the main memory (RAM).
- MMU: Memory management unit is responsible for virtual-to-physical address translation. On the chip it has something called a TLB (Translation look-aside buffer) to cache these address translations. If there is cache miss on the TLB, then the ‘page tables’ on the main memory (RAM) are used.
CPU Caches
As discussed before, CPU is super-fast. Even reading from main memory is very slow for the CPU. Hence, it does everything it can do avoid doing so. It has multiple levels of caches, often known as L1, L2, L3 caches. They are also called on-chip, on-die, embedded or integrated cache, external cache etc.
L1 Cache: This is the fastest cache, and is separate for each CPU core. it is divided into 2 caches — Instruction cache and data cache. This can be accessed in 1 to 3 CPU clock cycles.
L2 Cache: This is also fast, though upto 10x slower than L1. This is generally shared between all cores in a multiprocessor cores. This can take a dozen CPU clock cycles.
L3 Cache: This is not in all systems, and not so fast as L2 but still faster than RAM. This is sometimes referred to as ‘Last — Level Cache’ (LLC).
For context, accessing RAM might take >200 cycles, with additional latency for address translations. The order of access is L1 -> L2 ->L3 -> RAM, as you would have guessed.
An important challenge here is to keep the L1 caches updated when one core updates a memory and other core has the translations cached. This is called, unimaginatively, cache coherence problem.
In coming days and months, we will dig deeper into each of the OS components and learn concepts and implementations. If you are interested to learn these and up-level your computer engineering skills, please consider subscribing to this newsletter.
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