Cisco’s New Silicon Will Change the Economics of the Internet
Networking silicon luminaries just announced a breakthrough five years in the making — a new networking ASIC designed to power the Internet’s digital innovation for the next decade
The Internet has an unquenchable appetite for bandwidth. As the world navigates the emergence of several new and developing technologies like 5G, AI, quantum computing, IoT and others, the physical and economic limitations of the current infrastructure powering the Internet are becoming more apparent.
The traditional methods of squeezing more performance out of silicon chips will soon become prohibitively expensive and complex. Eventually, as The Economist puts it, microprocessor components will reach a “fundamental limit of smallness.” Silicon chips are now manufactured at such a microscopic level that to keep on the Moore’s Law trajectory of doubling performance at a regular rate, improving silicon becomes not only expensive, but manufacturers begin to wrestle with the limitations of physics.
…Microprocessor components will reach a ‘fundamental limit of smallness.’
Engineering leaders at Cisco believe the industry is reaching that technical ceiling now, right at a time when the Internet and abundant amounts of bandwidth are becoming more crucial to the business of its customers. But the company began preparing for this challenge nearly half a decade ago.
In 2014, Cisco Engineering Fellow Rakesh Chopra was tasked with building an in-depth analysis on this very inflection point. He examined the trajectories of the economics of microprocessor development; the potential limits of future — now current — processing and networking equipment; future bandwidth demands of the Internet and its large-scale networks; and the ways Cisco could lead in this transition.
In his analysis, he found the point at which the trajectory lines cross one another and begin a period of unsustainability is the year 2019.
Building a Chip for the Future
During Chopra’s analysis of semiconductors and their potential diminishing return on performance, he came across a fabless silicon startup called Leaba Semiconductor.
Ofer Iny, now also a Cisco Engineering Fellow, co-founded Leaba Semiconductor in 2014. Before that, he and co-founder Eyal Dagan started Dune Networks, which architected some of the most powerful chips still on the market today.
The mission this time, Iny said in an interview, was to develop a new silicon architecture that would be programmable, scalable, and avoid any trade-offs on performance that are typical to ASICs.
After some persuasion of company leadership from Chopra and his team, Cisco acquired Leaba Semiconductor in 2016. What resulted is a programmable networking silicon architecture that Cisco says will change the very economics of the Internet. The new silicon architecture is called Cisco Silicon One™.
Cisco recently announced details of the new silicon architecture as well as the full scope of the company’s strategy to build an Internet for the future that will power the next decade of digital innovation. The strategy focuses on driving the development of three core technologies that leaders at Cisco say will be the levers that will “push the boundaries of innovation to the next level.” Those three core technologies are silicon, optics, and software.
“At the start, you think, ‘This doesn’t make sense. It’s impossible. It can’t happen.”
The new ASIC — named Q100 — Cisco says, is the foundation of the strategy. It’s a “clean-sheet” silicon architecture, and to make it programmable and flexible without any performance trade-offs, Iny and multiple teams of engineers had to take an entirely new development approach.
At the beginning of the project in 2014, Iny said there was no way to know what future bandwidth demands would be but historical trends suggested they would be high.
“At the start, you think, ‘This doesn’t make sense. It’s impossible. It can’t happen,’” Iny said. “But that’s on the technology side. On the market demand side, it’s a bit easier for me, because there is such a clear historical trend that if you can double the performance, the market will consume it.”
A Fundamentally Different Architecture
Cisco Q100, the first chip built on the new Cisco Silicon One architecture, will provide more than 10 Terabits-per-Second (Tbps) of routing bandwidth without the typical compromises on programmability, buffering, power efficiency, scale or feature flexibility that usually come with networking silicon design. It is enough bandwidth, in one chip, to route enough traffic for a mid-sized city.
Cisco’s announcement also suggests these chips will push to 25 Tbps or higher in the near future.
But fast performance is not everything. Simply making a new, faster chip was not the goal for Iny and his counterparts at Cisco. Instead, they wanted a chip architecture that could provide unparalleled performance at a cost point similar to the silicon already on the market, and that would be universally applicable to all of Cisco’s market segments.
When Chopra heard the pitch from Leaba Semiconductor back in 2014, he was struck by the design and features, but the start-up’s proposed approach left a strong impression.
Most chips on the market are designed to be as powerful as current component size and physics will allow, and software is applied on top of it. Iny and the team at Leaba wanted to change that paradigm and design the chip to be purpose-built for customer needs. Doing so would require making hardware engineers and software developers work closely together simultaneously, iterating on builds back and forth.
Success would require an architecture with an entirely new approach to efficiency.
Optimizing for Efficiency
In the past, when it was possible to build network devices using a single chip, power efficiency — now one of the most important benchmarks for performance — was not as much an issue. Likewise, the physical size and space of chips and the real estate inside networking boxes weren’t as constrained. But as the industry progresses, and demand for more processing power increases, continually boosting performance in an ever-smaller form factor becomes increasingly more difficult.
“If you look at our biggest core routers in the industry, three or four years ago we were talking about a full rack of equipment consuming 10 kilowatts, and delivering eight terabits of bandwidth,” Chopra said, speaking to the evolution in networking power consumption.
“Now you talk about one chip, delivering 10 terabits at a couple of hundred watts, so it’s a huge shift in the industry,” he said. “The power is the hardest thing in the system today. How do you deliver hundreds of watts to a chip? How do you cool hundreds of watts in a chip? If you’re dissipating two to three hundred watts in a chip, that’s really hard to do.”
To tackle some of these difficult challenges, Iny said the team at Leaba decided from the beginning to take a clean sheet approach — that is, to not rely on any traditional methods of architecting silicon — and, having joined Cisco, to put software developers and hardware engineers in lockstep to develop both the software and hardware of Cisco Silicon One with power efficiency in mind.
“It makes you take a look at what’s really needed … and not just build what you built last time plus five percent.”
The new development paradigm also brings focus on customer outcome, Chopra says.
“It makes you take a look at what’s really needed. Combined with an iterative, dynamic development structure, it allows you to build features that matter, and not just build what you built last time plus five percent,” he said.
It also creates a unique treatment of some of the core processes of the chip. Data movement, for instance, is one key innovation Iny says saves a lot of power. By developing an architecture that only analyzes data once, the chip saves a lot of efficiency by keeping latency and power use down.
“Really efficient buffering is also key to being power efficient,” Iny said. “The fact that it is a single, shared buffer makes the buffer itself much more effective. You basically have your resources available where you need them only. You don’t have your resources dedicated to particular functions, as it is in many other architectures.”
One Chip to Route Them All
Adaptability is another compromise typically found in ASICs that are purpose-built for networking functions. To get really fast routing, chips usually come with few programmable features. Cisco wanted customers to get a universally applicable chip that could serve any market without that trade-off.
It was a very tall order, and Iny said it required a novel approach for system-level aspects of the silicon. What results is an architecture that does not rely on proprietary link protocols or specialized fabric links that manufacturers typically have to rely on.
“Our device can be fully utilized in a standalone mode with all I/O capacity presented as network interfaces, losing none of the I/O capacity of the device in that mode, which is extremely attractive and efficient,” Iny said. “Plus, the same device can be used on a line card with the same device sitting on a fabric card to build a large-scale system.”
What he’s driving at is this one architecture can operate across multiple devices, serve multiple markets, and create an entire system without losing any performance capability. Also, Iny says the chip’s design allows it to be programmable through P4, a high-level and readable programming language, to make it more accessible.
That is a big differentiator from how chips are made and applied today.
Not Just a New Chip in the Same Box
Rakesh Chopra and his team were in charge of figuring out how to harness all this newfound power and capability in a single rack unit. The challenge was amplified, Chopra said, in that the team had to plan not only for this iteration of Cisco Silicon One, but also the future iterations that will be even more powerful.
“When you build big, modular systems, they have to have longevity in them. So we have to be ready for this generation, the next generation, and probably even the next one after that … now,” Chopra said.
As an example of how challenging this design is, a typical networking box may have 1,000 serial interfaces. But to build a 260T fully redundant router, the new product will need more than 14,000.
From a power distribution perspective, Chopra said a typical modern networking box can be capable of distributing tens of kilowatts, but to provide longevity, his team needed to prepare for hundreds of kilowatts of power distribution. That need raised all kinds of considerations and potential issues in power safety, temperature rise, lifetime degradation, and other — and those, in turn, led to innovations in power supplies, connectors, optical modules , PCB manufacturing, power planes, memory technology, and others.
“At the end of the day, I think, one of the amazing things about the new Cisco 8000 series, is if even one of these things didn’t work, the product would not be able to launch,” Chopra said. For his team, it was a reprioritization to think of “what problems do we need to solve? And for whom do we need to solve them?”
Looking Ahead
Chopra and Iny both said they foresee a near future where not just the tier 1 web-scale and service providers will want to deploy Cisco Silicon One.
“Ten terabits [accounts for] the vast majority of the need for bandwidth in the service provider market,” Chopra said. “So what does it mean to a tier 2 or tier 3 provider customer? They no longer have to buy a mammoth 42RU, completely difficult-to-install and difficult-to-manage, buggy system that they’ve been deploying forever. They can buy one system, built on one piece of silicon, and deploy it everywhere. So they may not be the first customers, but they may ultimately be the ones to get the most benefit in the long run.”
It is an entirely new category of product, built for the future. And Cisco sees it as the foundation of the next decade of digital innovation.
To learn more about the Q100 chip, the Cisco Silicon One architecture, the Cisco 8000 Series and the changes coming to flexible consumption models, please visit the Cisco Newsroom or Cisco Blogs for executive insight.
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