PTI chair sees FOPLP as alternative solution for IC scaling

FOPLP (fan-out panel level package) will be a new option that is not meant to support pushes to 7nm, 5nm or even more advanced nodes but rather to provide a packaging solution that can achieve IC scaling without adopting costly advanced fabrication processes, according to DK Tsai, chairman of Taiwan-based backend specialist Powertech Technology (PTI).

Originally published at https://www.digitimes.com on November 21, 2019.