Towards an FPGA-Based Edge Device for the Internet of Things

Introduction

IoT( Internet of things) represents a collection of billions of tiny smart connected devices and sending secured data through the internet to dedicated online cloud servers. At present there are around 30 billion of smart devices installed and connected to the cloud, representing four devices for each individual person in the world.Concerning the adoption of wireless technologies for IoT, three emerge as the main contenders to maximize deployment,such as IEEE 802.11/Wi-Fi, IEEE 802.15.4/ZigBee and Bluetooth.The way the IoT devices implement their selected technology will affect the application area and thus, the device’s interoperability and connectivity. FPGA acts as a solution and aims to increase the performance and thus improve the efficiency of the edge-devices by implementing design choices, mainly by offloading critical software features to hardware.

IOT-BASED FPGA ARCHITECTURE

For this work, tactics aiming to increase systems performance will be explored, by selecting best design choices, e.g., offloading to hardware in this case. For the proposed architecture the hardcore processor will run the Contiki OS, the open-source operating system for IoT.

The system architecture is based on a Smartfusion2 SoC from Microsemi which is mainly composed by an ARM Cortex-M3 processor and the FPGA fabric for specific hardware implementations. An IEEE 802.15.4 RF transceiver is connected to the UART bus to enable the device’s communication and allows as well message interception for further processing.

For the communication stack the Contiki-OS is selected. It provides a full communication stack with other recent low-power wireless standards specially designed for the IoT devices.

PRELIMINARY RESULTS

To evaluate which features are suited to hardware offloading, specific micro benchmarks were performed. The selected micro benchmarks encompass some features of the implemented IoT stack, from the MAC layer, till the Transport layer.

The results suggest that the given execution time can be reduced if these features were implemented in FPGA fabric. With dedicated hardware the selected tasks can perform faster and the CPU can be switched to energy saving modes earlier.

CONCLUSION

The proposed work presented the prototyping of an FPGA based edge device for IoT, focusing on the connectivity space problem. It is described the planned implementation for an IoT protocol stack under a cost-effective SoC FPGA, and presented which features appear to be good candidates to offload to hardware.