AI in Chip Design, Multi-Billion Gate ASICs, and Celebrating Women in STEM: The Synopsys February Blog Roundup
By: Editorial Team
We’re looking back on some of our top blogs for the month of February. In the era of Smart Everything, the chip design process has taken center stage as the catalyst of innovation.
Dive deeper for valuable insights from our experienced thought leaders on implementing AI in chip design, collaborating with universities, resetting domain crossing, and much more.
Women in STEM have provided numerous contributions to the field of engineering, leading to many historic moments worthy of recognition. Today, the next generation of women is teed up for achievements in areas such as AI, 5G, automotive, and high-performance computing. In celebration of the International Day of Women and Girls in Science, we highlighted a few of our valuable STEM leaders at Synopsys, from director of R&D, Mariya Braylovska, to intern, Priyanka Joshi.
2. Integration Challenges for Multi-Billion Gate ASICs: Part 2 — Reset Domain Crossing
Rimpy Chugh, product marketing manager in the Silicon Realization Group, and Paras Mal Jain, group director R&D, explore the potential catastrophe of resetting domain crossing on ASIC designs. The key challenges developers should be aware of include dealing with reset-less sequential paths, glitching clock signals and overlooking true negatives during manual analysis. As it turns out, robust signoff is not only a necessity for clock-domain crossing but is a requirement for optimal reset domain crossing as well.
3. Customer Spotlight: Synopsys PrimeSim Circuit Simulation Improvements with NVIDIA A100 GPUs
GPUs have seen a vast overhaul over the last few decades as their initial function to simply render graphics has evolved to high-performance computing tasks such as deep learning, artificial intelligence, and more. To continue this era of advancement, Synopsys and NVIDIA partnered to deliver a hybrid architecture utilizing PrimeSim Continuum with the NVIDIA Ampere Tensor Core A100 GPU. With this technology, designers can achieve significant performance improvements while meeting signoff accuracy requirements for today’s advanced applications.
4. With AI-Driven Chip Design, So Much Is Possible
As the complexity of machine learning models has ramped up, software has essentially taken over technology as we know it. But to address this increase in complexity, the compute demand to execute these models has been forced to ratchet up. In this post, Stelios Diamantidis, senior director of AI Strategy & Solutions, delves into the ways in which artificial intelligence has been integrated into the chip design process, creating a new industry standard and allowing more innovation in less time.
5. Bay Area Engineering Students Get a Career Head Start with Synopsys EDA Tools
Building collaborative relationships with universities worldwide, Synopsys has the unique opportunity to support the next generation of engineers as they begin to tackle STEM’s biggest challenges at the early stages of their careers. Two examples of this symbiotic relationship are Synopsys’ partnerships with San Jose State University and San Francisco State University. Through the implementation of Synopsys technology in classroom research, these institutions will continue to make invaluable contributions to the semiconductor industry for years to come.
To view full-length versions of these articles along with other solutions-based pieces, visit our From Silicon to Software Blog.
