Hardware development on a Mac OSX

Discover all the tools to compile and run VHDL/Verilog designs on OSX with open source tools.

Emrick Sinitambirivoutin
5 min readMay 25, 2019

When it comes to hardware development, having a Mac doesn’t seem to be the best choice. Indeed, most of the tools needed to compile, run and simulate VHDL/Verilog are mainly available for Linux and Windows systems. In this article, I will present some of the tools that I found that could be run on OSX and that allows me to do my hardware developments and to simulate my designs.

In this article, this article you will learn :

  • How to install a VHDL/Verilog compiler on OSX
  • How to install a waveform viewer on OSX
  • How to make all those tools works together in order to work on your projects

Let’s get started!

1. Compile and run VHDL on OSX

In order to simulate the design, VHDL code is treated as a software language and it is compiled to run on a CPU as a software program. There are a large number of commercial simulation packages including those included with FPGA design environments. But there is also an Open-Source alternative like GHDL. It’s a VHDL compiler built on top of GCC/LLVM (it performs VHDL to C cross-compilation first). When compiled, the code generated can be executed on an x86 processor allowing you to simulate your hardware behavior and how the signals behave at each stimulation of your system.

How to install GHDL on OSX

Like any other packages or software, GHDL can be installed with a package manager using precompiled sources or can be compiled from sources. We will see both methods here.

For precompiled sources :

echo 'export PATH="/usr/local/opt/ghdl-release/bin:$PATH"' >> ~/.profile

Very simple, but sometimes lastest releases are not available straight away or you might want to rebuild from scratch on your Mac. So here is how you can build GHDL from sources

To compile from sources :

  • Clone their GitHub repository
git clone https://github.com/ghdl/ghdl.git
cd ghdl
git remote rename origin github
  • Generate Makefile
cd ghdl/
mkdir build
cd build
../configure --with-llvm-config --prefix=PREFIX
  • Compile sources
make
make install
  • Add the PATH to your .profile:
echo 'export PATH="PREFIX/ghdl/bin:$PATH"' >> ~/.profile

2. Compile and run Verilog on OSX

In the world of hardware development, there is VHDL but there is also Verilog. In order to simulate a Verilog design we also need to compile the code in order to run it on a CPU before implementing it into real hardware. Icarus Verilog is a free compiler implementation for the IEEE-1364 Verilog hardware description language that runs on OSX.

Prepackaged distribution :

brew install icarus-verilog

Compile from sources:

  • Clone their GitHub repository
git clone https://github.com/steveicarus/iverilog.git
cd iverilog
git remote rename origin github
sh autoconf.sh
  • Generate Makefile
cd iverilog/
mkdir build
cd build
../configure --prefix=PREFIX
  • Compile sources
make
make install
  • Add the PATH to your .profile:
echo 'export PATH="PREFIX/iverilog/bin:$PATH"' >> ~/.profile

3. Visualize waveforms

When you have compiled your sources into a GPU executable, you then need to visualize how the signals behave during the execution of your code. To do so, you will need a waveform viewer in order to draw those signals and to navigate the timeline of the program execution. One of the best open source tools that I found to do this is gtkwave. It’ is a fully featured GTK+ based wave viewer for Unix, Win32, and Mac OSX.

Prepackaged distribution :

port install gtkwave

Compile from sources:

  • Un-tar the source code into any temporary directory.
cd gtkwave-X.X.X/
mkdir build
cd build
../configure --prefix=PREFIX
  • Compile sources :
make
sudo make install

An example project using this workflow

Now that you have all your tools installed, we are going to use this simple example in order to show you how easy it is to simulate VHDL on your MAC.

This example is a simple 8-bit adder that adds 2 signed bytes together and gives you the result in output. In order to test our code, we also need to provide a test bench that will apply some signals into our adder design. We can then check if the design is working properly by displaying all signals in a waveform viewer in order to check if we obtain the desired outputs according to the inputs that we applied in the testbench.

Here is the structure of the project :

I will focus on the Makefile in this part as you are probably already familiar with the VHDL syntax (you can find all the sources of the project on my GitHub).

Compiling the VHDL files with GHDL require two steps:

  • Importing sources: this step scans all the design units for our top design in the correct order so that GHDL knows which file to compile and in which order
  • Make the executable: this step analyzes and elaborates the top design and generate an executable in the working directory

Generating the waveform requires one step:

  • Running the executable generated in the previous step with the--wave option in order to generate a wave file (.ghw).

To visualize the waveform generated during execution, you just need to lunch gtkwave with the generated wave file by typing make view .

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