Medical Image Processing using Verilog Hardware Description Language
Image processing algorithms implemented in hardware have emerged as the most viable solution for improving the performance of image processing systems and the introduction of reconfigurable devices and hardware description languages has further accelerated the design of image processing in hardware. To implement the image processing algorithms and to process the large amount of data captured from sources such as medical instruments, intelligent high speed real-time systems have become imperative.
An innovative hardware implementation of a real-time configurable system for medical image processing implementation and simulation followed by immediate synthesis using FPGA is discussed in this article. The system discussed in this article is pipelined architecture of a real-time system for image processing. Main focus here was on medical images enhancement. The hardware modeling was done with the hardware description language Verilog Xilinx ISE Design Suite environment.
Basic image processing algorithms were considered to observe results. This application offers solutions for problems that one may encounter in the real time processing of images, particularly in the case of medical images or in any area where image processing is required in real time and the processing speed is important.
