IIT-Madras develops ‘Shakti’ RISC-V based SoC in India
Researchers of the Indian Institute of Technology Madras have developed India’s first indigenously-developed RISC V Microprocessor — ‘Shakti’. RIMO is the code name of the Shakti C-class based SoC that has been taped-out at ISRO’s Semi-Conductor Laboratory (SCL) at Chandigarh using 180 nm process technology. The 144 sq.mm. chip has been tested to operate at a frequency of upto 70 MHz. The chip has been packaged on a 208 pin Ceramic Quad Flatpack (CQFP).
Shakti is an open-source initiative by the RISE group at IIT-Madras, which is not only building open source, production grade processors, but also associated components like interconnect fabrics, verification tools, storage controllers, peripheral IPs and SOC tools. The Shakti project is building a family of 6 processors, based on the RISC-V ISA. The Project is funded by the Ministry of Electronics and Information Technology, Government of India.
In July, an initial batch of 300 chips designed by IIT-M (RISECREEK) were fabricated at Intel’s facility in Oregon, US, and later booted the Linux Operating System.
According to Professor Kamakoti Veezhinathan, Reconfigurable Intelligent Systems Engineering (RISE) Laboratory, Department of Computer Science and Engineering, IIT Madras, the microprocessor fabricated in India was using a 180nm process technology, while the one in the US was using a 22 nm process technology.
The features of the core are :
- In-order 5 stage 64-bit micro controller supporting the entire stable RISC-V ISA (RV64IMAFD)
- Compatible with latest privilege spec (v1.21) of RISC-V ISA and supports the sv39 virtualisation scheme
- Includes a branch predictor with a Return-Address-Stack
- Pipelined IEEE-754 compliant single and double precision floating point units
- Multi-channel Direct Memory Access (DMA) support
- Peripherals like 2 x I2C, 2 x UART, 2 x QSPI, a JTAG Debugger, a 256kB tightly coupled memory, 32-bit GPIOs and an expansion bus that can be connected to an FPGA.
“It could also be used in embedded low power wireless systems and networking systems, besides reducing reliance on imported microprocessors in communications and defence sectors. The microprocessor could be used by others as it is on par with International Standards,” said a statement from the Institute. “With a large percentage of applications requiring sub 200 MhZ processors, the current success paves way to productisation of many hand-held and control application devices.”
“This development will assume huge significance when systems based on Shakti processors are adopted by strategic sectors such as defence, nuclear power installations, and government agencies and departments,” the IIT-M communiqué read.
“Around 2017 we got a funding from the Ministry of Electronics and Information Technology, under which we are doing two processors — one is of the embedded class which can be used for IOT type of applications and another would be out-of-order superscalar class which can be used as a basic building block for laptops, mobile phones etc,” said Professor Kamakoti Veezhinathan.
Design was done using Bluespec System Verilog hardware description language (HDL) at RISE Lab, IIT-M and backend activities were done using commercially available tools at SCL Chandigarh. The resulting GDS (Graphic Database System) was sent for fabrication at SCL. The chip was mounted on a PCB designed at the RISE Lab.
