Introducing the Ankaa™-1 System — Rigetti’s Most Sophisticated Chip Architecture Unlocks a Promising Path to Narrow Quantum Advantage

Rigetti Computing
Rigetti
Published in
8 min readAug 10, 2023

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By Andrew Bestwick, VP, Quantum Device Architecture

Rigetti’s fourth-generation architecture combines the hallmarks of Rigetti systems –accessibility and scalability–with new two-qubit gates mediated by tunable couplers for higher performance. The Ankaa-1 system, the first QPU built on this architecture, is now internally deployed and marks a major leap forward for our technology, customers and the field of superconducting qubits. Relative to past systems, the gates are faster and the connectivity is denser, opening up new possibilities for application and algorithm development. We believe this is the architecture that will bring us to narrow quantum advantage (nQA), and the Ankaa-1 system represents a landmark moment towards achieving that goal.

Rigetti’s Ankaa-1 system 84-qubit chip. Photo Credit: Drew Bird Photo

We are also thrilled to share that Riverlane is our first partner to use the Ankaa-1 system. Riverlane is focusing on improving error correction techniques on the new architecture. This early work on the Ankaa-1 system is tightly coupled with Riverlane’s quantum error correction expertise. A key goal of this collaboration is informing future strategies and optimized implementations of error correction.

“We are excited to be the first Ankaa-1 system external users,” says Steve Brierley, CEO and Founder of Riverlane. “This project enables us to target real-time error correction decoding with our algorithms on Rigetti’s FPGA hardware, which we hope will help improve performance on future systems.”

A quantum computer that demonstrates nQA will, by definition, outperform a classical supercomputer at particular problems along particular measures such as cost, speed, or accuracy. It will likely comprise an array of many hundreds of qubits, each of which can interact with several of its neighbors using pairwise operations that have low error rates. We believe a surefire way of ensuring such performance for these two-qubit gates is to make them fast. This is the main motivation for the new circuit architecture: fast gates in a dense lattice.

Neighboring superconducting qubits will readily interact with each other strongly and quickly, if you let them; the bigger challenge is turning the interaction off when you don’t need it. In our Aspen-class systems, we handle this by engineering a fixed coupling between neighbors and controlling the qubits’ resonant frequencies. Every other qubit in the lattice is “parked” at a high frequency, so that at rest the frequency separation between neighbors is large and the interaction is weak. During a two-qubit gate, we quickly modulate the qubit frequencies closer together to entangle them. This works, but limits how strong the coupling can be and how quickly the qubits can interact, or else the “always-on” interaction at rest will be too strong.

Tunable couplers remove this tradeoff altogether. They allow you to park the qubits’ frequencies close to each other while turning their interactions off. Then, from this “rest” state, just a small change to a tunable coupler turns on a very strong gate. Thus we have the best of both worlds: a resting lattice without unwanted interactions plus the ability to quickly entangle any pair of neighboring qubits. So far, the results have exceeded our expectations: the median two-qubit gate time on the Ankaa-1 system is nearly three times faster than on the Aspen-M-3 system.

Tunable couplers also allow each qubit to have more neighbors. In our Aspen systems, without the ability to completely turn off qubit-qubit coupling, we have to be much more careful to avoid activating unwanted interactions during gates. In practice, this limits the number of qubit neighbors to three and led to the adoption of the octagon lattice. With tunable couplers this limitation no longer applies. The Ankaa-1 system has a simple, densely connected square lattice in which each non-edge qubit can directly interact with four neighbors, enabling more efficient algorithms.

However, these benefits don’t come for free. The Ankaa-1 system is the largest, most complex system we’ve ever built. The modest qubit count jump from the Aspen-M-3 system to the Ankaa-1 system, from 80 qubits to 84, belies quite a lot of added supporting infrastructure. For example, each tunable coupler (which actually is itself a transmon qubit, even if we don’t operate it as such) is controlled independently. From this perspective, the Ankaa-1 system technically has nearly three times as many qubits as the previously largest chips in the Aspen product family. The number of control signals routed to the chip has increased from 160 to 317; readout lines have increased from 20 to 28. The dilution refrigerator that encloses the quantum hardware has a new high-density signaling scheme. Meanwhile, the control electronics have been reengineered and control software completely reinvented from the ground up to support the new circuit functionality.

The Ankaa-1 system has all of this without compromising on important Rigetti technology differentiators. As with Aspen-M systems, signals are delivered vertically to the chip from directly above the qubit, without any signal fan-out or routing from the chip perimeter. This means that scaling up to larger chips in the future will be simply a matter of expanding laterally. And although the Ankaa-1 system is a single chip, its design is natively ready for future assembly into a multi-die processor array. We’ve even demonstrated in R&D systems the new 2Q gates across chip boundaries with sub-1% error rates. We plan to construct future larger processors by tiling multiple silicon building blocks, much like how the 80-qubit Aspen-M processor is made of two 40-qubit Aspens.

Most importantly, all of this works! Rigetti engineers have been working for more than two years to prepare for this architectural transition, and delivered a system on schedule with all of the hardware functionality right out the gate. Yet this is only the beginning for this chip architecture. With the new hardware platform established, we have since turned our focus to raising performance.

In fact, we already have improvements in the works across several different dimensions. These include plans to lengthen qubit coherence times through chip design and fabrication changes, reduce the noise from our control electronics, optimize circuit design parameters, and use better signal amplifiers. At Rigetti we’re all about rapid iteration and continuous improvement. By learning from the Ankaa-1 system and making fast improvements, we believe we raise our chances at achieving the best possible performance for the next, publicly available systems, starting with the Ankaa-2 system anticipated later this year.

The success of the Ankaa-1 system is a critical milestone in our ongoing goal of providing our customers state-of-the-art QPUs to solve their most pressing problems, and to the longer-term goal of demonstrating nQA. The fourth generation chip architecture works, it’s fast, and it’s built for low error rates. We’re excited to bring our customers and partners along the journey as we work to realize its full potential.

Cautionary Language Concerning Forward-Looking Statements

Certain statements in this communication may be considered “forward-looking statements” within the meaning of the federal securities laws, including statements with respect to expectations of Rigetti’s business plan, including with respect to its objectives and its technology roadmap, its ability to achieve milestones including developing and more broadly releasing to the general public the Ankaa-1 84-qubit system and improve 2-qubit fidelity on Ankaa-1 on the anticipated timing or at all; Rigetti’s expectations with respect to the timing of next generation systems; Rigetti’s ability to scale to develop the Ankaa-2 system and develop practical applications on the anticipated timing or at all; the results of Rigetti’s work with its first external customer, Riverlane, and expectations related to error correction research; Rigetti’s expectations with respect to the anticipated stages of quantum technology maturation, including its ability to develop a quantum computer that is able to solve a practical, operationally relevant problem significantly better, faster, or cheaper than a current classical solution and achieve narrow quantum advantage on the anticipated timing or at all; expectations with respect to Rigetti’s plans to lengthen qubit coherence times, reduce noise from control electronics, optimize circuit design parameters and use better signal amplifiers; and the potential of quantum computing to solve customers’ most pressing problems and demonstrating narrow quantum advantage, and the timing thereof. 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Rigetti Computing
Rigetti

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