Introduction to Chip Manufacturing

Published in

Sesterce

8 min readJun 28, 2022

Introduction

Since the CoVID-19 global pandemic crisis and the ongoing economical conflict between the United States and China, a chip shortage has affected the worldwide semiconductor industry. This was caused by the increase in demand for consumer electronics, the lacks in almost all industries’ supply chains (therefore not ready for the shortages and the increase in demand), as well as several incidents occurring worldwide (destroyed manufacturing facilities, lockdowns that occurred during the pandemic, etc.) [1]. Moreover, as we’ll see through this article, a semiconductor chip takes a long time to manufacture (up to a year).

As of 2021, China represented over 26% of the semiconductor manufacturing market, with 1.15 trillion units produced [2]. The leading companies in advanced semiconductor technologies fields are Intel (USA), Samsung (Korea), and TSMC (Taiwan) [3].

However, several European countries are currently investing in the re-development of chip production on their territory, which could lead to better competitiveness in the industry of chip-making [4], and cheaper Application-Specific Integrated Circuits (ASIC) manufacturing.

This article aims to explain the steps taking place in the conception and production of an ASIC, from the silica extraction of the sand to the integration of the chip in a PCB.

Wafer manufacturing

It all begins with sand, as it is mainly made up of Silicon Dioxide (SiO2), Silicon being the main component of chips manufacturing. Silicon is extracted from SiO2 by heating it, together with coke (a high-carbon coal derivative) at a high temperature (above 1800°C) inside of an electric arc furnace, producing Silicon (Si) and Carbon Monoxide (CO).

Then, by using a “seed” starter crystal (which helps to orient the atoms in the resulting crystal, more on that later), a “Boule” is formed. A Boule is a monocrystalline, cylinder-like, silicon ingot, made of over 99.99999% pure silicon crystal (1 impurity in 10 million atoms).

Boule diameter can vary from 25mm up to 450mm, but most common ones are 100, 200 and 300 millimeters. As we will explain later, a bigger diameter means more chip-placing efficiency, but this also means more difficulty in manufacturing and manipulating the Boule.

Boules are then cut into thin layers, called “Wafers”, with the help of a particular type of wire-saw. Those Wafers are the heart of what will then become the chips, but to understand all of that, we first have to dive into the reason behind the use of Silicon.

Silicon and Semiconductors

Silicon is an element that has semiconductor abilities, meaning that it can act as a conductor, or as an insulator. In the Wafer that we’ve seen in the previous part, Silicon acts as an insulator, as its 4 outer-shell electrons are maintaining the crystalline structure (see diagram on the right). To make the structure conductive, we have to perform doping, meaning that we should “inject” atoms inside the crystal that have either one more or one less electron than silicon.

For explanation purposes, we’ll take the example of Phosphorus (one more electron) and Borous (one less electron), but keep in mind that other atoms could be used for doping.

By injecting a Phosphorus atom, we would add one more electron to the silicon lattice, as Phosphorus has 5 outer-shell electrons, whereas Silicon only has 4. That electron can move freely in the atomic mesh. We call this type of doping “N-conductive”, as it has a more negative charge than the regular silicon lattice.

By injecting a Boron atom, we would “remove” one electron from the silicon lattice, as Boron has 3 outer-shell electrons. That “hole” in the mesh will allow other electrons to be transferred from connected silicon atoms, moving them across the atomic mesh. We call this type of doping “P-conductive”, as it has a more positive charge than the regular silicon lattice.

Those types of doped areas will be very useful for designing transistors, as we’ll now discover.

Transistor, the primordial component

Transistors are the main components of nowadays integrated circuits. They are able to regulate current and voltage in an electronic circuit, as well as acting as electronically-controlled interrupters.

Since they have various applications, be they in power electronics, microelectronics, high, low frequencies… There exists numerous types and sizes of them, so we’ll take the example of Complementary Metal-Oxide Semiconductor Field Effect Transistors (C-MOSFETs or CMOS for short) in this article, as they are primarily used in digital electronics. However, there exists various other types of transistors, such as Bipolar ones or JFETs, which are also used in Integrated Circuit applications.

A transistor is a component with 3 main electrodes :

The Drain, generally connected to the “stable” potential of the circuit (Alimentation or Ground).
The Source, defining the command parameters.
The Gate, on which the command voltage is applied : Depending on Vgs (voltage difference between the Gate and the Source) and Vt (a constant of the transistor), the gate will “open” or not (letting the current flow across the transistor).

MOSFETs used in numeric applications are divided into 2 groups : NMOS and PMOS, forming a CMOS when used together.

NMOS are composed of a N-doped canal inside of a P-doped substrate. This means that the Drain and Source will be N-doped, and embedded in a P-doped Substrate. A NMOS will be passing when Vgs is superior to Vt, letting the flow of current go to the Drain, which is connected to the low-voltage (0V or -Vdd).

On the other hand, a PMOS is composed of P-doped Source and Drain, embedded in a N-doped substrate. However, for simplicity of the process, the manufacturing takes place in a P-based substrate, in which is implanted a “N-well”. Moreover, a PMOS will be passing when Vgs is inferior to Vt, letting the flow of current go to the Drain, which is connected to the voltage source (+Vdd).

A CMOS is a combination of both PMOS and NMOS, allowing the output to be “1” (+5V for instance) or “0” (0V), by connecting the entries (the Gate A) and the outputs (the Sources Y), as shown on the schematic below.

Then, by connecting several PMOS and NMOS together, we can create complex logical gates, by orienting the input signal to the right Gates and the output one to the right Sources.

For instance, see the NAND = NOT(A AND B) on the right side : The PMOS are connected to Vdd and the NMOS to Vss (= -Vdd). The current will flow through the NMOS (Out = ’0’) when both A and B are positive, but will flow through the PMOS (Out = ‘1’) when only one of them is not.

By repeating this process on all gates and creating a complex circuit with thousands and thousands of transistors, we can create a chip capable of, for instance, mining.

Processing Wafer into Chips

Once that our transistor-based circuit is designed, and that we’ve made our first layout (the placement of the different “zones” as n-well, p-substrate, p-well, and such), we still have to complete it by wiring all of our components together. To do this, we need to place other material on our layout, such as the different Metal layers (connecting components and crossing across the design).

Note that all the steps below need to be conducted in a clean room, meaning an environment where the air is constantly flowing outwards, in order to prevent as many impurities from contaminating our Wafer. To give you an idea of how clean those rooms need to be, an ISO 1 class cleanroom (the most “secure” one where people could physically enter), the number limit for 0.1µm particles is of 10/m², and almost none greater particles, as the rest of the air would just be ambient gas, implying dioxygen and diazote [5].

For context, one of your hair is approximately 50µm wide, and a virus such as the Corona Virus measures 0.12µm. Inside the machines applying these steps, the “particle security” is even higher than that.

Once that last step is done, we can proceed to really manufacture our ASIC. To do this, we will have to proceed step by step, about a hundred nanometers at a time.

Starting from the pure silica Wafer, we’ll add a very thin layer of photosensible resin onto our chip, and then proceed to overlay a mask representing some parts of our circuit (let’s say, the bottom-level P-doped substrate), across which we will apply a source of parallel rays of light, which will, depending the choice of material, solidify or liquify the exposed resin. This process is called photolithography. Then, after rinsing the liquified resin with a chemical bath, we would apply gazified ions of Boron to make a P-doped substrate. Once the Boron ions penetrated the surface enough, we would wash the Wafer, etch the remaining resin, wash it again, and we would have an approximately clean diffusion of ions on our Wafer.

If we wanted to create N-wells on our circuit, we would need an additional machine called a Particle Accelerator, which would purposely choose ions and implant them in a very precise, yet slow and expensive way. So we would have to start again our steps of resin deposit, mask overlay, light application, rinsing, implanting our ions, washing, etching, and washing again to make another step towards our integrated circuit.

We would then have to repeat the same steps over and over for all the different components and depositions (Silicium Oxide for isolation, Metal connections, etc.), and we would then, hopefully, have a finished working integrated circuit.

Then, we have to repeat the sawing process to cut the Wafer into smaller pieces, which are the chips we just created.

Embedding the chip in a PCB

Now that we have the dies of our chips, we can implant them on a Printed Circuit Board to monitor and control them, wiring the external connections on different connectors. After having tested their proper functioning, we can connect the control board to a computer via a USB connection, or directly to the web via ethernet. And now, time to mine !