SSD Firmware Development — Part 2 — NAND Basics
Before we dive straight into SSD firmware development, let’s in simple terms, define what an SSD is. An SSD is simply a digital storage device that mainly uses flash memory as the primary storage medium. The flash memory used is most predominately NAND flash. An SSD will also have a controller, which at a minimum includes one or more CPU’s, specialized hardware to work with flash memory, volatile memory (RAM), and hardware to interface with host protocols such as SATA, USB, and NVMe. Other hardware components may be available on more advanced controllers.
Figure 1 — Simple SSD architecture
NAND Flash Memory
Since NAND flash memory is the cornerstone of an SSD, an understand of NAND flash and how they work is essential to develop firmware and understand why firmware is even necessary. NAND flash technology changes and progresses with newer innovations, but they all possess some basic characteristics and operations in which we can explore.
NOTE: We’ll first cover typical 2D NAND. With 3D NAND, things are a bit different.
NAND devices are typically organized in arrays of bit cells. With single-level cell (SLC), each cell can store 1 bit of information. The cells are arranged in rows and columns.
Figure 2 — NAND flash memory cell
In common terms, a row of memory cell is called a page. A group of pages is then arranged into a block. And in turn, multiple blocks are grouped into a die, and multiple dice into a chip, and multiple chips into a device.
Figure 3 — NAND memory block
These arrangement structures have significance in terms of their operations. These are the basic NAND flash memory operations: read, write or program, and erase. Let’s briefly go over the characteristics of these operations.
Read
A read operation is performed on a page level. When the controller requests a read operation on the NAND device, it would specify the chip select (CE) and provide the row address. The NAND device will read an entire page from the NAND cells and typically places it in an internal memory buffer to be transferred out into the controller’s memory.
Write or Program
A program operation is performed on a page level. When the controller requests a program operation on the NAND device, it would specify the chip select (CE) and provide the row address. The controller will transfer the data to be programmed to the NAND device and seal with the final program command.
A page cannot be written to more than once without an erase operation preceding the next program operation.
It is recommended and often necessary that pages within a block be written in non-decreasing order (e.g. page 0, page 1, page 10, …).
Erase
An erase operation is performed on a block level.
There are definitely more details and intricacies of NAND flash memory to be explored. We’ll explore such details progressively when they become relevant.
Host Interaction
For SSD’s and other storage devices, the host generally initiates the interactions by sending commands to the devices. There are a plethora of commands and they vary with different protocols. However, they all must have the bare essential commands for storage in which we will begin to explore.
Identify or Inquiry
The device returns essential information describing the device and its capabilities
Write
Host requests to store data to the device.
Read
Host requests data from the device.
We won’t go into details of the Identify or Inquiry command at the moment as the information and format of the data returned varies for different protocols. Even Write and Read commands have many different forms. The next part in the series will first focus on the foundation of write and read commands.

