High Speed Signal Integrity Tips
This is part 1
Imagine squeezing 100 people in a room designed to hold a maximum of 50. If every two or three people were to start talking among themselves there would be a lot of noise, so much, that it would be challenging for anyone to hear clearly. Moving across the room would be difficult — requiring one to walk slower in order to avoid obstacles such as chairs and people.
The same happens in high speed densely populated electronics circuits. Compared to the inability to move fast in a full room, high-speed signals will have the same challenge; especially if there are several discontinuities, sharp bends, impedance mismatches, etc. As a result, this will affect signal quality and circuit operation.
Addressing signal integrity issues in today’s densely packed, low power, and small factor circuits is a challenge. As the speed, the number of functions and devices increase, the PCB design and circuit operations become complex. Frequently ensuring signal integrity in these circuits requires a lot of engineering effort and some compromises.
Imagine squeezing 100 people in a room designed to hold a maximum of 50. If every two or three people were to start talking among themselves there would be a lot of noise, so much, that it would be challenging for anyone to hear clearly.
Problems that often arise at high speed include the reflections at interconnects, electromagnetic radiation from the traces, grounding issues and more. If not addressed, these can lead to distortion, attenuation, and other issues that make the circuit unstable, unreliable and even unusable.
Main Signal Integrity Issues
As the main signal speed increases, the rise time for the chips become shorter, and signal integrity issues arise.
Other than the design, issues such as the PCB layout, interconnection, component placement, and others begin to affect the signal flow and characteristics. The poor design practices are likely to cause coupling paths, parasitic characteristics of the components and paths, ground conditions at non-zero potential points, trace inductance, and many other problems.
The problems that become apparent at higher frequencies include:
- Crosstalk
- Bandwidth degradation
- Signal loss
- Distortion
- Reflections due to impedance mismatches
- EMI within or from outside the components in the system
- A collapse of power and distribution networks
- Ground bounce
Impedance Issues
A change in the impedance of the signal path leads to problems such as ringing, reflections, distortion, undershoot, overshoot, and degradation. The signal will see these changes as discontinuities. The effects are more pronounced at higher frequencies in digital circuits.
Usually, each of the net traces exhibits characteristic impedance whose value depends on its geometry and cross section. As long as the impedance of the trace, as seen by the signal, does not change there will be no distortion. However, any change in impedance leads to signal reflections and distortion at the point of change.
Impedance discontinuities can arise from poor design and layout features, open circuits at the end of a net, a line stub, or a trace branch on the net. Other factors include a change in trace width, connector pins, or a via that carries the net to a different PCB layer.
For example, impedance mismatches at the pins on each end of the connectors on a PCB cause reflections and significant signal degradation. One approach in an attempt to avoid this is to add a termination resistor or an RC network to help match the termination impedance and minimize the reflections.
Transmission Line Effects
The inductance and capacitance of a trace have a significant impact at high frequencies. Transmission line effects become an issue when the wavelength of a signal is in the range of the trace length. In addition, at the GHz level, an interconnection network along the transmission line such as between an integrated circuit and the PCB will cause scattering and reflection of the signal. Consequently, the signal suffers from distortion and degradation due to impedance and other discontinuities along the path.
To minimize the transmission line effects:
- Maintain the same line impedance throughout the entire track length. Usually, the combination of factors that influence the impedance includes the dielectric constant of the board, the distance between the trace and the ground plane as well as the line thickness. In most cases, the line may transverse through different layers, and you may need to vary the thickness to ensure that the impedance value remains the same.
- Place a ground plane underneath the signal traces.
Electromagnetic Interference
EMI may emanate from the circuit, its components, or from other devices nearby. High EMI levels will degrade the signal quality and affect the circuit operation. The long traces usually act like transmitters and receivers of unwanted signals. Other than radiating EMI, the long high-speed routes will also receive interference signals from nearby devices. Since these long traces create unintentional antennas, the best practice is keeping them as short as possible.
Effective ways of reducing the EMI include one or a combination of the following:
- Proper routing, including placing the return path under the signal line.
- Using low inductance traces to limit the radiation of the RF
- Shielding the PCB and sensitive components. While this can reduce the impact of the external interference signals, it may affect the transmissions and you must be careful when implementing this to avoid preventing outgoing signals.
- Proper Grounding: Ground the PCB adequately to manage the incoming and on-board EMI.
- Using the shortest possible high-speed signal traces. Try and keep them further away from the adjacent traces.
Crosstalk
Crosstalk occurs when differential signals travel along traces that are close together. Crosstalk often occurs between the traces of transmitting and receiving signals. When high-speed signal traces are close together, the rapid transition of the voltage and current in adjacent traces causes inductive and capacitive coupling. These lead to voltage spikes, signal distortion, and data errors.
Other than insufficient spacing, the other causes include poor implementation of the length matching serpentine, and placing the signal and clock lines close together.
Minimize crosstalk by doing the following:
- Use wider line spacing: — Separate parallel traces with a space that is at least three times the trace width to reduce coupling.
- Placing transmission lines as close as possible to the ground plane to minimize capacitive coupling.
- Using shorter parallel run lengths.
- Ensuring that if two lines need to cross they do so at right angles.
- Applying the differential routing techniques in critical nets.
Overcoming Signal Integrity Issues
Ideally, the designer needs to consider the signal integrity from the time of drawing the schematic, until the board passes its final test. It is essential to pay attention to trace length restrictions, grounding, capacitor placements, trace impedance, selection of connectors, power ground planes, and other factors throughout the process.
End of part 1 (stay tuned for more tips in part 2)
