VLSIPDPhysical Design in VLSI: Why It Matters, What It Entails, and How It’s DoneIn the realm of Very Large Scale Integration (VLSI), physical design is a critical phase that bridges the gap between a circuit’s logical…May 20
Shivam katiyarHow to integrate RAL in TestbenchThis topic holds immense popularity across various testbenches when verifying any design. I will guide you through a systematic…Jan 23
Mohan SardarDesign of a 4-bit Arithmetic Logic Unit (ALU) using Verilog: This project involves designing an ALU…Verilog Design:Oct 4, 2023Oct 4, 2023
Shivam katiyarConfigDB: The Heart of UVMThis article is for engineers who are new to verification methodologies or are in the process of adopting UVM, this focuses on the UVM…Oct 30, 2023Oct 30, 2023
VLSIPDPhysical Design in VLSI: Why It Matters, What It Entails, and How It’s DoneIn the realm of Very Large Scale Integration (VLSI), physical design is a critical phase that bridges the gap between a circuit’s logical…May 20
Shivam katiyarHow to integrate RAL in TestbenchThis topic holds immense popularity across various testbenches when verifying any design. I will guide you through a systematic…Jan 23
Mohan SardarDesign of a 4-bit Arithmetic Logic Unit (ALU) using Verilog: This project involves designing an ALU…Verilog Design:Oct 4, 2023
Shivam katiyarConfigDB: The Heart of UVMThis article is for engineers who are new to verification methodologies or are in the process of adopting UVM, this focuses on the UVM…Oct 30, 2023
VLSIPDFloorplanning in Physical DesignIn the intricate world of VLSI (Large-scale integration), where precision, efficiency, and innovation are essential, floorplanning plays a…Oct 20
qurrat ul ain alamGSoC’23: Parameterized device layouts for GF180MCUFinal report of my journey of Google Summer of Code 2023 with Free and Open Source Silicon Foundation.Oct 9, 2023
