Test driving Scaleway’s RISCV64 cloud hosts in Paris.

RISC-V in Scaleway Cloud

A quiet announcement landed in the past few weeks that French cloud provider Scaleway is live hosting Alibaba’s RISC-V platform to their cloud users. As a RISC-V International member (individual) I’d been looking forward to testing this for a long time, including joining the waitlist at Alibaba around 2 years ago. Current political climate and sanctions have delayed this but it’s nice to see a European provider support the cause with RISC-V and offer Alibaba’s SoCs locally for a test drive.

French cloud Scaleway starts renting Alibaba's RISC-V SoC

Unlike x86 and Arm architectures, KVM still doesn’t support hardware virtuliazation for the riscv64 ISA. This means that even cloud providers can only give you a physical host — not a VM instance of RISC-V. Technically you could be given an emulated RISC-V VM running on x86/arm or any architecture but performance wouldn’t be worth it.

Documentation/Platforms

The good news is how incredibly affordable it is to get a physical host. Scaleway isn’t offering any support SLA and the SoC is both cheap and energy efficient, so at the time I’m writing this they offer physical hosts at €15.99/month compared to their entry-level Xeon/Ryzen hosts at €43-€50+ per month.

Network is limited to 100Mbps and memory at 16GB. Also I believe the onboard MMC storage is the only option, so this experiment clearly isn’t about performance. Still let’s test drive them to see what kind of performance can be expected. More performant RISC-V chips are on the way but this entry level platform is worth a test drive today.

Firing up a host turns out to be pretty simple, with Scaleway offering Debian and Ubuntu based images standard. I would love to see Fedora/EL based images but this is adequate for our test drive. It takes just a few minutes to spin up — longer than a VM but not bad given they’ve managed to orchestrate cloud hosts in a fresh SoC platform. First thing is first. Getting into the host and checking out the hardware via dmidecode reveals nothing. DMI support hasn’t been added to this platform yet or possibly the OS. VisionFive boards have had this support for a while I believe, but we’ll just need to assume we have a standard 4-core RISC-V chip.

$ sudo dmidecode 
# dmidecode 3.5 
# No SMBIOS nor DMI entry point found, sorry.

Naturally the next step is to throw some benchmarks at it. Installing trusty Phoronix Test Suite gives some of my favourite benchmarks. First a basic test of the 128GB onboard MMC storage reveals a respectable 200MB write, 300MB read contiguous performance. Latency is also fairly good as this storage is built-in.

$ dd if=/dev/zero of=test bs=4M count=100 oflag=direct
100+0 records in
100+0 records out
419430400 bytes (419 MB, 400 MiB) copied, 2.06242 s, 203 MB/s
ubuntu@riscvtest:~$ dd if=test of=/dev/null bs=4M iflag=direct
100+0 records in
100+0 records out
419430400 bytes (419 MB, 400 MiB) copied, 1.39017 s, 302 MB/s

Now trying one of my favorite benchmarks, compress-zstd. This test uses one thread per logical CPU by default, and gives a good indication of compute and thermal stress capability. I’m not sure what kind of cooling they have set up at Scaleway but stress testing reports temps of up to 70C which is reasonable though the fixed clock speed of 1.8Ghz is pretty conservative to keep heat issues under control.

$ watch sensors
Every 2.0s: sensors

pvt-isa-0000
Adapter: ISA adapter
temp1:        +70.1°C  
temp2:        +66.2°C

Three passes of compress-zstd level 3 reveal a speed of 54MB/s, which isn’t particularly impressive and reflects similar performance as the consumer SBC options from VisionFive. The same test run on the i7–1165G7 in my Dell XPS reaches about 1,400MB/s depending on how hot and fast I let it run. A properly cooled modern server or Apple Mx will score even higher. Still the RISC-V chip is using much less energy and provides a respectable performance/watt ratio for green initiatives.

Conclusion

The real winner for the future of this is cloud providers pushing serverless options. The true reason serverless is so efficient is that when you upload your source code or script, the backend can be whatever architecture the cloud provider has available. A bit of Python or JS won’t care if it’s being run on Arm/x86/RISC-V. With cloud providers developing their own chips and cutting Arm out of the loop, they have one more option available for customers that don’t care what architecture is being used in a serverless environment. One thing RISC-V will really need to address before it becomes viable in the cloud is KVM support. Hardware accelerated virtualization has been “soon” for RISC-V going back at least 4 years. Without VM isolation cloud providers and users may have security concerns when sharing physical hosts either serverless or native. I applaud Scaleway for launching this experiment and I hope it pays off for them. At the very least it keeps Arm on their toes and helps keep pricing competitive.