HARDWARE ACCELERATORS FOR MACHINE LEARNING.
In most of the Machine learning area deep neural network plays a very important role. Convolution Neural network is classic deep learning network which is mostly used in vision based tasks.[1] In the recent years CNN has four well known architectures that are AlexNet, VGGNet, Inception, ResNet. AlexNet is the first deep convolution neural network for large-scale image classification tasks. VGGNeet is a modification of AlexNet. Inpection is CNN that contains inception modules. Inception modules increases computation efficiency. ResNet has adopting residual shortcut connection in CNNs. The CNN accelerator architecture is shown in fig.1.
The accelerator architecture of convolution neural network takes input feature maps and weight matrices from the off-chip memory and then it performs CNN computation by streaming data through each building blocks. [2].There are two levels of parallelism in the convolution neural network. First level is known as Computation unit level, in this arithmetic circuit is replicated to produce more result in one cycle. Second level is the Kernal level, In this multiple convolution kernels are placed on the same FPGA device. The data representation T does not need to be fixed in this architecture. Following table shows Parameters for the cNN accelerator architecture.
There are basically three resources in the in the FPGA device which are Look up tables, flip-flops, and Block RAMs that acts on cheap memory. Digital signal processors (DSPs) contains high-performance arithmetic units.
In CNN-based Object detection there are mainly two algorithm YOLO and Faster R-CNN. Architectures of these algorithm evaluate are Inception and VCG-16 respectively.
References
1.] A. Krizhevsky, I. Sutskever, and G. E. Hinton, “Imagenet classification with deep convolutional neural networks,” in NIPS, 2012.
2.] K. Simonyan and A. Zisserman, “Very deep convolutional networks for large-scale image recognition,” arXiv preprint arXiv:1409.1556, 2014.
