Development Principles and Criteria for The Selection of VLSI-Structures for Coordinated Parallel Calculation of Basic Operations of Real-Time Digital Signal Processing Algorithms

Laksh Maheshwari
vlsi in dsp
Published in
2 min readJun 10, 2021

In this research, the authors have proposed the development of VLSI structures for real-time calculation of OTT algorithms’ basic operations with a highly effective hardware usage based on the integrated approach with considerations about the capabilities of modern element base, taking into account new methods, algorithms, and VLSI-structures, fulfilling the requirements of specific applications and data stream intensities.

In order to take full advantage of modern VLSI technology, the authors have decided to use the following principles as the basis for the development of operational devices for the real-time calculation of OTT algorithms’ basic operations:

  1. Usage of arithmetical operations basis, correlation of the input data stream intensity with the computational capacity of the operational device
  2. Conveyer usage and spatial parallelism
  3. Implementation of calculation algorithms of fast OTT algorithms’ basic operations in a form of a single macro-operation
  4. Regularity, modularity and widespread usage of standard elements
  5. Localisation and reduction of the number of connections among the device elements
  6. Structure specialization and adaptation to the calculation algorithms and data input intensity.

They have developed a faster calculation method for the one-phase VLSI-realisation of fast OTT algorithms’ basic operations. According to it all of the operations come to the macro operation of group summation:

where,

m: number of items,

n: number of item digits,

Cjі: ith digit of the jth item,

The main elements of such devices are multiple rows code generator, multiple rows into two rows code transformer, two-row result generating scheme, and parallel summation block.

Batyuk, A., Struk, E., & Tsmots, I. (2007). Development Principles and Criteria for The Selection of VLSI-Structures for Coordinated Parallel Calculation of Basic Operations of Real-Time Digital Signal Processing Algorithms. 2007 9th International Conference — The Experience of Designing and Applications of CAD Systems in Microelectronics. doi:10.1109/cadsm.2007.4297517

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