Instruction Set Architecture (ISA): Operations/ Assembly Language

Assembly Language 101 |Computer Organisation — 102

This is series of blogs in which I am explaining more about Instruction set architecture. This article is second article of this series.

What we will Learn in this Series?

• What is ISA?
• High Level Languages and Low level Languages
• Operations initial idea
• Operands
• Complex Operations
• Encoding of instructions
• Some Cool stuff with string datatype
• Floating point instructions and representations
• MIPS Assembly Language : HLL to Assembly

Other Important Computer organization topics:

• SRAM and DRAM
• Number Representation

Arithmetic Operations

Consider the following C language code.

a = b + c;
d = e + f;
d = a + d;
b = d + e;

For understanding purpose consider we have only 4 register (r1, r2, r3, r4) available and currently the syntax we are going to use here for assembly language is not exactly same (I am going to use some common terms instead of actual ones so that it will be easy for you to understand the things.). Now we have only limited registers so cannot blindly assign the operands to registers. If we assigned a to r1, b to r2, c to r3 and e to r4 then we are not left with any register now but still we have some operands left.

So let’s see how to manage this registers to complete the above execution.

1. Step 1 (a = b + c) : allocate r1 to a, r2 to b, r3 to c

load r2, address_b
load r3, address_c
add r1, r2, r3   # a = b + c, r1=a, r2=b, r3=c, r4=?

2. Step 2 (d = e + f): If you see above (python code), we will not use value of b and c further so we can reuse the register r2 and r3 to load any other value. So we will load value of e in r2 and value of f in r3 and store the value of d in r4.

load r2, address_b
load r3, address_c
add r1, r2, r3
load r2, address_e
load r3, address_f
add r4, r2, r3   # d = e + f, r1=a, r2=e, r3=f, r4=d

3. Step 3 (d = a + d): Now the value of a and d are already in register so we can directly execute the command.

load r2, address_b
load r3, address_c
add r1, r2, r3
load r2, address_e
load r3, address_f
add r4, r2, r3
add r4, r1, r4   # d = a + d, r1=a, r2=e, r3=f, r4=d

4. Step 4 ( b = d + e): Now all four registers are currently in use. In such situation we will store value of any variable from register to memory location and in this register load/store the value of required variable. So in our case value of a and d is changes so we will update these values to memory location.

load r2, address_b
load r3, address_c
add r1, r2, r3
load r2, address_e
load r3, address_f
add r4, r2, r3
add r4, r1, r4         # r1=a, r2=e, r3=f, r4=d
save r1, address_a     # r1=a, r2=e, r3=f, r4=d
save r3, address_d
add r1, r3, r2         # b = d + e, r1=b, r2=e, r3=f, r4=d
save r1 address_b      # r1=b, r2=e, r3=f, r4=d

Logical Operations

Consider the following logical expressions

int a, b, c;
a = b & c
b = a ^ c
c = c | a
b = ~b

corresponding assembly code:

load r2, address_b
load r3, address_c
and r1, r2, r3     #a = b & c,  r1=a, r2=b, r3=c, r4=?
xor r2, r1, r3     #b = a ^ c,  r1=a, r2=b, r3=c, r4=?
or r3, r3, r1     #c = c | a,  r1=a, r2=b, r3=c, r4=?
nor r2, r2, $0    #b = ~b,  r1=a, r2=b, r3=c, r4=?

In above code we used $0 in nor operation, in MIPS assembly language one register is allocated (fixed) value zero.

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If you are interest in knowing how we can convert conditional statements into assembly language read my next article. I hope you liked this articles.

Kudos……………………………………………………………………………… Thanks for Reading this article.