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Low Power Assertions for Power Gating Sequece
Power Gating is become the most common strategies in today’s trending nm technologies. Power Intent Designs are dominating the Chip design which needs more verification attention and strategies to verify the intents. So a generic SVA is arrived to verify the PSO sequence.
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Power Gating is become the most common strategies in today’s trending nm technologies. Power Intent Designs are dominating the Chip design which needs more verification attention and strategies to verify the intents. So a generic SVA is arrived to verify the PSO sequence.

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