Rad-Tolerant Quad-Core DIY Processor for FPGAs

Clive "Max" Maxfield
Supplyframe
Published in
4 min readDec 4, 2019

When you’ve been involved with something for a long time, you tend to assume that other people are as familiar with the topic as you. Perhaps this explains why I’m always so surprised to meet practicing engineers who are woefully lacking in understanding as to the capabilities of field-programmable gate arrays (FPGAs).

A few days ago, for example, one of my articles was published on the Digi-Key website (see Fundamentals of FPGAs: What Are FPGAs and Why Are They Needed?). Whenever something I wrote goes live, I post links to it on Twitter and LinkedIn. I just checked my LinkedIn account to see that this entry has already received 1,764 views, which tells me that (a) people are really interested in this subject (happy face) and (b) they don’t already know this stuff (sad face).

Sometimes people just need to see something that grabs their imagination. How about the fact that microprocessors (MPUs) and microcontrollers (MCUs) are subject to radiation effects in the form of single-event upsets (SEUs) that can flip a register bit or memory element from a 0 to a 1, or vice versa (see also Registers vs. Latches vs. Flip-Flops and What the FAQ are CPUs, MPUs, MCUs, and GPUs?).

As you can imagine, having register and memory bits unexpectedly adopting incorrect values can cause all sorts of problems. One way to address these problems is to create three or more instantiations of the processor, to have them all working in parallel, and to employ a voting circuit to compare their outputs and use the values agreed on by the majority of the processors. In a moment, I’ll tell you where you can access an example of this, but first…

One of the most venerable of MCUs is the Intel 8051, which was introduced in 1981. The 8051 is arguably the most influential MCU of all time with multiple billions of units sold. Amazingly enough, 8051 derivatives are still around today because they are deeply embedded in so many legacy systems; also, there’s a huge amount of 8051-based expertise, code, and intellectual property (IP) available.

As an aside, I used to know John Wharton, who designed the instruction set architecture for the 8051 (I say “used to know” because John shrugged off this mortal coil last year). John told me he was a junior engineer at the time, and he ended up in a lunchtime meeting that marked the launch of the 8051. In fact, John was only there because he’d heard rumor that there were going to be free sandwiches (Ah, the power of free sandwiches; I’ve been lured by their siren song on many an occasion myself), but he listened to the ideas being bounced around and — on returning to his desk — he sketched out what was to become the architecture of the 8051.

But we digress… In my MCU Designer’s Intro to FPGA Hardware column here on Supplyframe Hardware, we discussed how we can visualize the programmable fabric inside an FPGA as comprising myriad small “islands” of programmable logic in a “sea” of programmable interconnect. Also, that we can use this programmable fabric to implement any logic function(s) our hearts desire.

Generic representation of a mid-range FPGA (Image source: Max Maxfield)

Any function implemented in the programmable fabric is said to be a “soft” function (as opposed to a function implemented directly in the silicon, which is said to be “hard”).

One of my chums, Edward “Ted” Fried is an FPGA designer at Apple. As a hobby, Ted has developed a number of FPGA-based projects that include a superscalar RISC-V and cycle accurate clones for the Intel 8086, 8051, and MOS 6502 MPUs and MCUs.

Ted’s MCL51 is an 8-bit 100% instruction-set-compatible 8051 core that can be implemented using as few as 312 LUTs of a Xilinx Artix-7 FPGA. As a proof-of-concept, Ted has created a radiation-tolerant Lockstep Quad Modular Redundancy (Lockstep QMR) system with the ability to rebuild itself after experiencing a variety of soft errors, including Single Event Upsets (SEUs) and Single Event Transients (SETs).

In this video, we see the Lockstep QMR system playing a music program. While the modules are running, a variety of errors are injected causing them to fail, but the others carry on while the failed module heals itself and joins back in without any problems manifesting themselves in the outside world.

The reason I’m waffling on about all of this here is that Ted contacted me to say that he’s just uploaded this Lockstep Quad Modular Redundant System to Github for you to to access it and play with it if you wish.

You can also visit Ted’s MicroCoreLabs.com website to discover all sorts of other goodies. Experimenting with this Lockstep QMR system is a great way to learn about FPGAs in general, along with implementing MPUs and MCUs as soft cores and using multi-module redundancy to mitigate against radiation effects. Enjoy!

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Clive "Max" Maxfield
Supplyframe

Over the years, Max has designed everything from silicon chips to circuit boards and from brainwave amplifiers to Steampunk Prognostication Engines (don’t ask).