CCS Note 08: Lesson 3. ePWM Setting And Application
Instruction
How to utilize CCS for configuring ePWM (Enhanced Pulse Width Modulator) and PWM (Pulse-Width Modulation) basic applications
Environment
This document utilizes the following setup:
Operating System: Windows x64
Code Composer Studio Version: 11.2.0.00007
Development Board: LAUNCHXL-F28379D (STM320F28379D)
Tutorial List
Reference Materials
Register Data, System, and Module Details
TMS320F2837xD Dual-Core Delfino Microcontrollers Technical Reference Manual (Rev. I) (ti.com)
Pin Mapping
Module Memory & Flash Architecture
The TMS320F2837xD Architecture: Achieving a New Level of High Performance (ti.com)
Memory Allocation Setting
TMS320C28x Assembly Language Tools v22.6.0.LTS User’s Guide (Rev. Y) (ti.com)
Some Magic Bugs Records
TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Rev. M)
Import Example from C2000Ware
Example: CPU1 — epwm_deadband (CPU1 means single core.)
Project Path: C:\ti\c2000\C2000Ware_4_01_00_00\device_support\f2837xd\examples\cpu1\epwm_deadband
Section 1. Basics Exercise
Utilizing ePWM1, ePWM2, and ePWM3 modules, each module generates two complementary signals, identified as ePWMxA and ePWMxB, both switching at a frequency of 20kHz. Furthermore, please set GPIO6 (J8 PIN80) as an input function to receive signals.
A. When GPIO6 receives a low voltage (signal 0), output with the following Duty cycle and dead time settings.
B. When GPIO6 receives a high voltage (signal 1), output with the following Duty cycle and dead time settings.
Section 1.1 Basic Introduction
The ePWM module is extremely powerful and complicated, and advanced content can be referred to in the following articles.
A. ePWM Clock Source
Based on figures 3–5 Clocking Source and 15–5 Time-Base Submodule Signals and Registers provided in the Technical Reference Manual, we can roughly understand the transmission mode of the Clock. To calculate the clock rate, we need to know the frequency of the source and the number of times it has been divided and multiplied in order to calculate the Clock frequency accurately.
B. ePWM Output Frequency
With the TBCLK clock, we can determine the frequency of the PWM through the up-down counting principle of the PWM module. Simply put, it uses the TBCLK to trigger the counter for timing. By counting out the corresponding target values and then resetting to zero, we can obtain the corresponding periodic PWM waveform. Figure 15–6 shows the corresponding relationship between the period and the counter under various counting modes. By calculating the value corresponding to the frequency and setting the TBPRD accordingly, the ePWM module can output the desired PWM frequency.
C. ePWM Output Frequency Summary
Calculation of TBCLK
The aforementioned diagram in Parts A and B has been summarized, and key parameters are indicated as shown below.
The manual recommends that the TBCLK should not exceed 100MHz.
The manual recommends that the TBCLK should not exceed 100MHz.
The manual recommends that the TBCLK should not exceed 100MHz.
The calculation method is as follows.
Here, the unit of TBCLK is Hz.
Calculation of TBPRD
The computation formula given by the manual is as follows. The reason for adding 1 in the up-count and down-count modes is that the counter starts from 0, so there is an extra 1.
Here, the unit of T_TBCLK is seconds, which is the reciprocal of TBCLK. The unit of TBPRD is counts, which is the target value for the counter.
Rearranging the terms, we can obtain the following formula.
Here, the unit of TBCLK is Hz, which is convenient for integrating the results of the computation in advance.
D. Calculation of Dead-time
Section 1.2 ePWM Setteing
A. Action-Qualifier Submodule (AQ)
Examples for AQ Setting
Complementary Mode:
If Dead Band Module (DB) is ALC / AHC, the output of ePWMxA and xB at same submodule will be complementary automatically.
B. Dead-Band Generator Submodule (DB)
For dead-time control.
Example for DB Setting
Section 1.3 Setup for Initialization
A. Initialize ePWM output pin (GPIO Mux)
//! — ePWM1A is on GPIO0
//! — ePWM1B is on GPIO1
//! — ePWM2A is on GPIO2
//! — ePWM2B is on GPIO3
//! — ePWM3A is on GPIO4
//! — ePWM3B is on GPIO5
main function ( epwm_deadband_cpu01.c)
Detail in F2837xD_EPwm.c
After interrupt (ISR) initialization
main function ( epwm_deadband_cpu01.c)
TBCLK Setting (for ePWM module input clock)
TBPRD Setting (for PWM ouput freq.)
AQ Submodule Setting (for PWM output behavior)
DB Submodule Setting (for PWM dead-time behavior)
Notice: Where is EALLOW / EDIS ?
Section 1.4 Experiment Code
[Hidden] Do it yourself!!
[Hidden] Do it yourself!!
[Hidden] Do it yourself!!
Section 1.5 Experimental Results
The frequency and period are extremely precise, and the dead-time accuracy is also quite high (the author’s oscilloscope measures Duty in a rather odd way XD).
A. ePWM1 Output (Duty = 20%; Deadtime = 1us)
B. ePWM2 Output (Duty = 50%; Deadtime = 2us)
C. ePWM3 Output (Duty = 70%; Deadtime = 3us)
Section 2. Advanced Exercise
Utilize the ePWM1A, ePWM2A, and ePWM3A modules to generate three-phase interleaved PWM waveforms with a phase difference of 120 degrees between each PWM group. The Duty of ePWM1A is set to 20%, ePWM2A to 50%, and ePWM3A to 70%; the switching frequency for all is set to 50kHz.
Section 2.1 Experiment Hint (Syn. ePWM counter)
Section 2.2 Experiment Code
[Hidden] Do it yourself!!
[Hidden] Do it yourself!!
[Hidden] Do it yourself!!
Section 2.3 Experiment Results
Since the author’s oscilloscope only has two channels, the waveforms can only be displayed this way.
It can be observed that the ePWM1A waveform leads the ePWM2A waveform by 6.7us (1 / 3 of a period), and the ePWM1A waveform leads the ePWM3A waveform by 13.3us (2 / 3 of a period). The results are correct.
Verification of Duty Cycle and Frequency Period
