VLSI for Neural Networks and Artificial Intelligence

HARDWARE ACCELERATORS FOR MACHINE LEARNING.

In most of the Machine learning area deep neural network plays a very important…

Optimizing FPGA-based Accelerator Design For Deep Convolutional Neural Networks

Loop unrolling can be utilized to improve the utilization of vast computation resources in FPGA devices. Unrolling along various loop dimensions will create different implementation variants…

Sparse Systolic Tensor Array for Efficient CNN Hardware Acceleration

A FPGA-based Hardware Accelerator for Multiple Convolutional Neural Networks.

In Field of Image processing and computer vision Convolution Neural Network plays a very important role in these recent days. A FPGA-based CNN accelerator are for used for multiple networks and its…

A VLSI DESIGN OF THE MINIMUM ENTROPY NEURON

In pattern recognition, the maximization of the transformation from the input to the…

Back-Propagation Learning Algorithms for Analog VLSI Implementation

There are many VLSI implementations of Neural Networks in both digital and analog mode. The selection strongly depends on the application. Analog VLSI NNs are most suited for biological models and to exploit…

AN ANALOG IMPLEMENTATION OF THE BOLTZMANN MACHINE WITH PROGRAMMABLE LEARNING ALGORITHMS

AN ANALOG CMOS IMPLEMENTATION OF A KOHONEN NETWORK WITH LEARNING CAPABILITY

A High-Throughput and Power-Efficient FPGA Implementation of YOLO CNN for Object Detection